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典型的例子,从互联网上下来,希望对大家有用,
典型事例,从网上down的,希望对大家有用,-Typical examples, from the Internet down, and I hope useful for everyone,
- 2022-03-30 06:06:30下载
- 积分:1
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18_vga_test
基于Xilinx Spartan6系列的fpga的VGA实现(Based on Xilinx Spartan6 series fpga VGA implementation)
- 2019-04-01 13:47:46下载
- 积分:1
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NCO of the VHDL process is the use of nuclear
NCO的VHDL程序,是利用IP核生成的,超好的,快下吧-NCO of the VHDL process is the use of nuclear-generated IP, super good, fast, are you
- 2022-03-22 15:41:09下载
- 积分:1
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";Verilog HDL设计指南";5
《Verilog HDL 程序设计教程》5-"Verilog HDL Design Guide" 5
- 2022-04-21 22:39:14下载
- 积分:1
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本章介绍了两个EDA技术的综合应用设计实例:数字闹钟和直接数字频率合成器DDS。...
本章介绍了两个EDA技术的综合应用设计实例:数字闹钟和直接数字频率合成器DDS。-EDA chapter describes the two technologies integrated application design example: digital alarm clock and direct digital synthesizer DDS.
- 2023-07-23 01:50:04下载
- 积分:1
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ALU vhdl
此模块模拟alu(算术逻辑单元)和测试台,以验证其工作是否正确。
- 2023-08-23 08:20:04下载
- 积分:1
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sinwave
使用verilog hdl语言编程正弦波信号,能仿真出结果(Can use verilog HDL language programming sine wave signal, the simulation results
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- 2013-09-18 15:27:27下载
- 积分:1
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系统设计
基于旋转编码器和LED灯组的强度调节系统设计(Design of Intensity Regulation System Based on Rotary Encoder and LED Lamp Set)
- 2020-06-21 02:00:01下载
- 积分:1
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VGA
VHDL语言实现VGA的显示彩条横条九宫格的功能。(VGA display color of the VHDL language bar Jiugongge function.)
- 2013-05-07 10:04:10下载
- 积分:1
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FIFO
This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)
- 2013-10-04 00:41:42下载
- 积分:1