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i2c
说明: 本文研究的IIC总线控制器具有如下特征
1.兼容飞利浦I2C标准,以主机模式与外围设备进行数据通信,对IIC从机模型进行读/读,读/写,写/写,写/读[18]。
2.多主操作
3.软件可编程时钟频率
4.时钟拉伸和等待状态生成
5.软件可编程确认位
6.时钟同步设计
7.仲裁中断丢失,自动转移取消
8.开始/停止/重复启动检测/确认生成
9.总线忙检测(The IIC bus controller studied in this paper has the following characteristics.
1. Compatible with Philips I2C standard, data communication between host mode and peripheral devices, read/read, read/write, write/write, write/read for IIC slave model [18].
2. Multiple Main Operations
3. Software programmable clock frequency
4. Clock stretching and waiting state generation
5. Software Programmable Confirmation Bit
6. Clock Synchronization Design
7. Loss of arbitration interruption and cancellation of automatic transfer
8. Start/Stop/Repeat Start Detection/Verification Generation
9. Bus busy detection)
- 2019-06-18 12:18:10下载
- 积分:1
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4x4-Keypad
fpga的一个小程序用于3s500e 4*4键盘模块(fpga is a small program used 3s500e 4* 4 keyboard module)
- 2013-07-21 11:41:36下载
- 积分:1
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61EDA_C2212
红色飓风II开发板USB2FPGA USB驱动程序,由verilog编写,包括源码和FIFO测试程序(Red Hurricane II development board USB2FPGA USB driver from verilog preparation, including source code and test procedures FIFO)
- 2013-05-30 14:22:07下载
- 积分:1
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DDS-Waveform-generator
采用FPGA实现的DDS波形发生器源码,可以实现频率幅值变换、正弦波、方波、三角波输出,输出频率可达1MHz(FPGA implementation of the DDS waveform generator source frequency amplitude transform, sine wave, square wave, triangle wave output, the output frequency up to 1MHz)
- 2012-06-29 23:20:58下载
- 积分:1
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floatadd
说明: 浮点数加法器的源代码,实现浮点数的加法功能,浮点数遵循的是IEEE745标准(floating_piont addition)
- 2021-04-06 18:19:02下载
- 积分:1
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tdc
time to digital convertor
- 2011-09-22 16:25:50下载
- 积分:1
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伪随机二进制序列无符号 17 位计数器
这通过反馈来实现一个 17 位伪随机的无符号计数器异或的位 0 和 3。 注意 ︰ 如果也绝不是独家使用相反,这会反相平行的位模式 & 这将意味着所有位都零是一种有效模式和所有那些不都是有效。 目前所有的都是有效的。
- 2022-02-15 14:03:54下载
- 积分:1
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RS(204-188)decoder_verilog
采用verilog实现的有限域GF(28)弱对偶基乘法器,本原多项式: p(x) = x^8 + x^4 + x^3 + x^2 + 1 ,多项式基: {1, a^1, a^2, a^3, a^4, a^5, a^6, a^7},弱对偶基: {1+a^2, a^1, 1, a^7, a^6, a^5, a^4, a^3+a^7}(Verilog achieved using the finite field GF (28) weak dual basis multiplier)
- 2016-06-12 16:31:51下载
- 积分:1
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QPSK_demod
说明: QPSK的解调程序,采用Verilog编写而成(QPSK demodulation program, written by Verilog)
- 2020-02-29 19:51:38下载
- 积分:1
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MAX48_cn
MAX481、MAX483、MAX485、MAX487-MAX491以及
MAX1487是用于RS-485与RS-422通信的低功耗收发器,
每个器件中都具有一个驱动器和一个接收器(The MAX481, MAX483, MAX485 The MAX487-MAX491, and MAX1487 low-power transceivers for RS-485 and RS-422 communication, each device has a drive and a receiver)
- 2012-07-10 21:28:46下载
- 积分:1