-
交通灯控制（VHDL）！！！！！！！！！！！！！！！！！！！！！！！！！！…
交通灯控制（VHDL）-Traffic Light Control (VHDL)! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !
- 2023-03-20 10:30:04下载
- 积分：1
-
延迟线模块的verilog代码，延迟线模块是数字电路设计常用的模块...
延迟线模块的verilog代码，延迟线模块是数字电路设计常用的模块-Delay-line module Verilog code, delay-line module is commonly used in digital circuit design module
- 2022-08-09 02:38:35下载
- 积分：1
-
UART Basic, hardwired RS232 UART.
--##############################################################################
- 2023-05-28 14:35:03下载
- 积分：1
-
Combination of shots, quartus2 with the ModelSim FBI put together a detailed ste...
结合截图，quartus2与ModelSim的联调的详细操作步凑，使初学者迅速上手-Combination of shots, quartus2 with the ModelSim FBI put together a detailed step-by-step operation, so that beginners get started quickly
- 2022-03-22 02:04:39下载
- 积分：1
-
all passed, I was carefully designed, fully meet the requirements of beginners....
全部通过，是我的精心设计，完全满足初学者的要求。0-99自动记数-all passed, I was carefully designed, fully meet the requirements of beginners. 0-99 automatic counting
- 2022-05-05 06:11:20下载
- 积分：1
-
StepMotor_CurrentLoop
实现二项混合式步进电机的驱动，和步进电机的细分程序。(The driving of binomial hybrid stepper motor and the subdivision program of stepper motor are realized.)
- 2020-06-21 02:20:01下载
- 积分：1
-
math_real
in this code very useful for designing real number concept
- 2013-11-19 19:54:40下载
- 积分：1
-
基于DDS的DA正弦波输出
Sample behavioral waveforms for design file sin_rom.vThe following waveforms show the behavior of altsyncram megafunction for the chosen set of parameters in design sin_rom.v. For the purpose of this simulation, the contents of the memory at the start of the sample waveforms is assumed to be ( 3F0, 3F1, 3F2, 3F3, ...). The design sin_rom.v has one read port. The read port has 1024 words of 10 bits each. The output of the read port is unregistered. Fig. 1 : Wave showing read operation. The above waveform shows the behavior of the design under normal read conditions. The read happens at the rising edge of the enabled clock cycle. The output from the RAM is undefined until
- 2022-01-26 04:06:16下载
- 积分：1
-
plldesign
pll(phase locked loop) is used to fix the circuit to particular frequency
- 2014-03-18 17:14:26下载
- 积分：1
-
3P3_wimdow
图像插值算法，窗口为3*3,用于图像的除去死点，以及提高清晰度或者使图像柔和(3*3 window)
- 2012-02-28 15:36:02下载
- 积分：1
