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VHDLAVRIPcore
说明： 使用VHDL语言写的AVR单片机IP核， 可以直接使用，已经经过验证， 十分珍贵哦(Written in VHDL language using the AVR microcontroller IP core, can be used directly, has proven very valuable oh)
- 2009-08-28 14:00:29下载
- 积分：1
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20080931
Design approach for VHDL and FPGA Implementation of
Automotive Black Box using CAN Protocol
- 2009-10-23 00:20:47下载
- 积分：1
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FPGA设计全流程－软件综合使用、
FPGA设计全流程－软件综合使用、 -FPGA design of the whole process- the integrated use of software, FPGA design of the whole process- the integrated use of software,
- 2022-12-25 07:35:03下载
- 积分：1
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FIFO
This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)
- 2013-10-04 00:41:42下载
- 积分：1
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tPad_Camera
tPad DE2-115/70开发板可用的摄像头采集、显示程序，QT10.0以上环境可用，原装代码，可以进行修改加以使用，如使用到倒车影像系统中，视频显示等。(tPad DE2-115/70 development board available cameras capture, display program, QT10.0 over the environment is available, the original code can be modified to be used, such as the use of the reversing video system, the video display.)
- 2020-07-09 19:58:55下载
- 积分：1
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WigglerJTAG
Wiggler Clone .JTAG Schematic and PCB in Altium Designer Format
- 2009-07-17 19:27:27下载
- 积分：1
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ag-overview
说明： agilex fpga description
- 2019-05-13 18:21:04下载
- 积分：1
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Verilog代码。注册成功，对FPGA的使用标准单元库…
verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
- 2022-06-15 14:54:08下载
- 积分：1
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只需要FPGA两个通用管脚，就可以实现FPGA与PC机进行以太网通信！！如果你有ALTERA_DE1的开发板，可以直接下再看效果，用其他板子就要重新分配一下管脚...
只需要FPGA两个通用管脚，就可以实现FPGA与PC机进行以太网通信！！如果你有ALTERA_DE1的开发板，可以直接下再看效果，用其他板子就要重新分配一下管脚，推荐使用电流输出。-Only two general-purpose FPGA pins, you can realize FPGA and Ethernet PC machine! ! If you have ALTERA_DE1 development board, you can look under the direct effect, with other board you will need to reconsider the distribution of pins, recommended the use of current output.
- 2023-07-19 16:10:04下载
- 积分：1
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Based on the state of the optical encoder Figure 4 multiplier vhdl procedure, en...
基于状态图的光电编码器4倍频vhdl程序，输入相位差90度的两相，输出倍频和方向信号-Based on the state of the optical encoder Figure 4 multiplier vhdl procedure, enter a 90-degree phase difference of two-phase, frequency and direction of the output signal
- 2022-03-17 02:46:02下载
- 积分：1
