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BT1120转GTX详细设计方案
说明: bt1120设计方案,描述了具体的方案设计以及整体的架构设计(Bt1120 design scheme, describes the specific scheme design and the overall architectural design)
- 2020-06-25 05:40:02下载
- 积分:1
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lpddr2
LPDDR2 SDRAM memories compliant to JEDEC JESD209-2.
- 2015-05-11 20:57:21下载
- 积分:1
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c4gx_f896_host_ddr2a_odt
ALTERA PCIE FPGA开发板(EP4C平台)DDR2内存测试代码(ALTERA PCIE FPGA development board (EP4C platform) DDR2 memory test code)
- 2011-09-07 11:57:21下载
- 积分:1
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responder3
基于VHDL的多路抢答器,用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)
- 2019-06-17 15:29:31下载
- 积分:1
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PipelineSim
一个计算机原理课程设计的作业,5级流水线CPU,指令集到代码均为自己设计,有最终报告文档,组建说明,并行除法,16位字长,定长指令,Verilog源代码,顶层设计图。结构简单,冲突解决方式也很简单,代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)
- 2012-06-24 22:19:14下载
- 积分:1
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FPGA SDRAM with the operation of the specific see internal note
用FPGA实现SDRAM的操作,具体操作见内部说明文件-FPGA SDRAM with the operation of the specific see internal note
- 2022-01-22 01:54:54下载
- 积分:1
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delayline_b
基于延迟线的数字脉冲宽度调制,用于电力电子设备的触发信号产生(puls wide modulator based on delayline)
- 2015-03-10 15:45:01下载
- 积分:1
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0720_03_AD_uart
基于fpga的verilog实现ad及uart,并进行仿真验证(Verilog based on FPGA implements AD and uart, and carries out simulation verification)
- 2019-01-21 20:52:46下载
- 积分:1
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很不容易找到的资料,基于VHDL的频率计设计 希望有用
很不容易找到的资料,基于VHDL的频率计设计 希望有用-Not easy to find information on the frequency meter based on the VHDL design seek to help
- 2022-04-21 13:02:06下载
- 积分:1
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PIC16系列单片机的Verilog描述的完整性
完整的PIC16系列单片机verilog描述-A complete description of PIC16 series of microcontrollers verilog
- 2022-07-23 07:13:49下载
- 积分:1