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Clutter-Filtering-
。给出了时域滤波的基本原理以及通常采用的
IIR 椭圆地物杂波滤波器的设计方法。重点研究了回归滤波器这一时域滤波算
法。从正交多项式的拟合出发,给出了回归滤波器抑制地物杂波的基本原理及
其滤波实现过程。通过对回归滤波器的计算复杂度的研究,寻找使回归滤波器
计算量最小的正交多项式。分析了回归滤波器频率响应特性,比较了回归滤波
器与IIR 椭圆地物杂波滤波器的计算复杂度。利用仿真的雷达信号,分析了回
归滤波器的地物杂波抑制性能。回归滤波器实际上是一高通滤波器,它在滤掉
低频地物杂波的同时,对落在滤波器阻带内的天气回波信号同样会造成衰减。
在天气回波信号谱宽固定的情况下,通过改变天气回波信号的平均多普勒频率,
分析了回归滤波器对它的衰减情况。在基于一组实际采集的雷达信号的基础上,
给出了回归滤波器的地物杂波抑制比随着滤波器阶数的变化情况。(Firstly, this dissertation introduces the research background and significance of
ground clutter suppression, analyzes the characteristics of the ground clutter and
weather signals in the Doppler weather radars and simulates Doppler radar echo
signals (It includes ground clutter, weather echo signals and the mixture of them).
The simulated signals are used later to study the time and frequency domain ground
clutter suppression.
Secondly, this dissertation talks about the time domain filtering, gives the basic
theory of time domain filtering and describes the design method of the usually used
fifth-order elliptic infinite impulse response (IIR) ground clutter filter. In the time
domain, the work focuses on the regression filter. From the orthogonal polynomials
fit, this dissertation gives the basic theory of the regression filter for ground clutter
suppression and the filtering process using a regression filter. Through the study of
the computational complexity of regression)
- 2012-07-09 22:12:11下载
- 积分:1
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MotorV2
基于PID 控制算法的直流电机控制,输出PWM波,很容易用(motor control)
- 2011-04-21 23:48:06下载
- 积分:1
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can_init
说明: 通过SPI接口实现FPGA和MCP2515独立CAN芯片通信,功能使用modelsim仿真,实现了配置、接收、发送功能。(The communication between FPGA and MCP2515 independent can chip is realized by SPI interface. The function is simulated by Modelsim, and the function of configuration, receiving and sending is realized.)
- 2020-12-30 09:28:59下载
- 积分:1
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USB转RS232
USB转RS232RSTTLRS485FT232+SP213串口的原理图AD画的(USB to RS232RSTTLRS485FT232+SP213 serial port schematic AD drawing)
- 2020-07-01 04:20:02下载
- 积分:1
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DCM_SP
数字时钟管理器,xilinx公司开发板集成时钟,实现分频、倍频等功能。(Digital clock managers, xilinx development board integrated clock divider, multiplier, and other functions.)
- 2021-02-19 09:59:44下载
- 积分:1
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UART_FIFO
FPGA,串口调试程序,接收模块,含FIFO IP核(FPGA uFF0C u4E32 u53E3 u8C03 u8BD5 u7A0B u5E8F uFF0C u63A5 u6536 u6A21 u5757 uFF0C u542BFIFO IP u6838)
- 2021-05-07 16:22:36下载
- 积分:1
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ep2c5 实现 逻辑门
verilog语言,quartus 2 仿真
ep2c5 实现 逻辑门
verilog语言,quartus 2 仿真-ep2c5 the realization of logic gates verilog language, quartus 2 Simulation
- 2022-09-08 22:10:08下载
- 积分:1
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本代码可以用于产生正余弦信号波形,利用FPGA内部的ROM放置一个正余弦采样点的数据表格,通过循环取址的方法,实现波形连续输出。...
本代码可以用于产生正余弦信号波形,利用FPGA内部的ROM放置一个正余弦采样点的数据表格,通过循环取址的方法,实现波形连续输出。-This code can be used to generate positive cosine signal waveforms, using FPGA" s internal ROM to place a sampling point is the cosine of the data tables, the circulation method of taking the site to achieve a continuous output waveform.
- 2022-04-24 00:31:32下载
- 积分:1
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vcp201_code是FPGA的源代码。
VCP201_CODE is a FPGA source code.
- 2023-06-03 07:10:03下载
- 积分:1
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DDR2 SDRAM 控制器的FPGA实现
DDR2 SDRAM 控制器的FPGA实现-DDR2 SDRAM controller FPGA to achieve
- 2022-03-22 23:48:44下载
- 积分:1