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cnt6
verilog实现的“六进制约翰逊计数器”。(verilog implementation of the " six hexadecimal Johnson counters." )
- 2009-09-18 19:11:18下载
- 积分：1
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NRZ_2_Manchester_Moore
this example exchanges the NRZ code to the MANCHESTER code with moore output
- 2010-01-29 18:46:08下载
- 积分：1
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PCI_PIO
不足20元的PCI设计，含ABEL源代码。(PCI design less than 20Yuan ,including ABEL code)
- 2005-08-28 02:44:26下载
- 积分：1
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str
these are verilg prgms
- 2012-12-05 18:12:51下载
- 积分：1
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matlab2DPSK
蒙特卡洛仿真图
这个程序对2psk信号进行仿真
前提是把信号能量归一化了
(This programme intend to realize the simulation of 2DPSK through MonteCarlo experiment.
intends
)
- 2013-05-04 13:18:00下载
- 积分：1
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VHDL-100-examples
VHDL 的100例程代码，能够使你熟练掌握VHDL语言的编写(100 routines of VHDL code, enabling you to master the preparation of the VHDL language)
- 2012-07-31 11:17:51下载
- 积分：1
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Asynchronous FIFO controller Verilog Design and Implementation
异步FIFO控制器的Verilog设计与实现-Asynchronous FIFO controller Verilog Design and Implementation
- 2022-08-14 15:39:50下载
- 积分：1
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5-15
用verilog语言实现基于DDS技术的余弦信号发生器，其输出位宽为16比特(Verilog language cosine signal generator based on DDS technology, the output bit width is 16 bits)
- 2013-04-18 22:58:05下载
- 积分：1
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黄金时段介绍STA
PrimeTime Intro to STA
-PrimeTime Intro to STA
- 2022-12-10 13:05:05下载
- 积分：1
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BMD_PCIE
自己根据xapp1052修改的源代码，已经编译成功，并应用在开发板上。(According xapp1052 own modified source code has been successfully compiled and used in the development board.)
- 2015-10-19 08:10:20下载
- 积分：1
