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VHDL_PS2
Spartan3e keyboard ps2
- 2010-01-28 18:38:40下载
- 积分:1
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VHDL编写的数字钟,在Q
VHDL编写的数字钟,在Q-ii下编译,实现闹铃设置与定时闹铃,分时秒显示-VHDL prepared digital clock, in the Q-ii under the compiler to achieve regular alarm and alarm settings, time-seconds display
- 2022-12-10 02:20:03下载
- 积分:1
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美国人写的各种类型的fpag设计指导,非常详细的介绍了从fpga的型号,结构,实现,编程,等各个方面的要点。...
美国人写的各种类型的fpag设计指导,非常详细的介绍了从fpga的型号,结构,实现,编程,等各个方面的要点。-Written by Americans of all types of fpag design guide, very detailed introduction from the FPGA models, structure, realize, programming, and other aspects of the main points.
- 2023-03-16 13:55:04下载
- 积分:1
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half_adrrrrder
FPGA上的一个半加器实例程序,通过测试,可以直接运行在fpga开发板上。(One and a half adder example on FPGA program, through the test, can be run directly on the FPGA development board)
- 2013-12-01 12:01:31下载
- 积分:1
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jjj
实现了四bit计数器的功能,使用的是VHDL语言描述(Four-bit counter, using the VHDL language description)
- 2012-12-20 10:53:46下载
- 积分:1
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pingpangqiu
基于basys2的简单的乒乓球小游戏,通过ise13.4开发,使用语言VHDL,能够通过VGA在显示屏显示,能够实现双人对打,有计分功能。(Simple table tennis game, based on basys2 through ise13.4 development, using VHDL language, can through the VGA display shows, can achieve a double play, scoring function.)
- 2014-07-04 01:42:00下载
- 积分:1
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5
说明: 用VHDL语言实现电子钟(Using VHDL language electronic bell)
- 2008-11-28 21:20:23下载
- 积分:1
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用verilog写的cpld的各种分频程序,希望大家指正,谢谢!
用verilog写的cpld的各种分频程序,希望大家指正,谢谢!-using Verilog cpld written by the various sub-frequency procedures in the hope that we stand corrected, thank you!
- 2023-01-20 06:35:04下载
- 积分:1
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QPSK调制的载波频偏估计 LR_algorithm
QPSK调制的载波频偏估计,是一个可以调用的函数。接收端进行了一系列的处理。经典的L&R法(QPSK-carrier frequence offset estimation_ L&R)
- 2020-06-27 04:40:02下载
- 积分:1
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rs-decoder-make-byvhdl
- RS码是Reed-Solomon 码(理德-所罗门码)的简称,它是一类非二进制BCH码,在RS码中,输入信号分成k·m比特一组,每组包括k个符号,每个符号由m个比特组成。(- RS code is a Reed-Solomon code (Reed- Solomon codes) for short, is a non-binary BCH code, the RS code, the input signal is divided into a set of k · m bits, each including k symbols, each symbol consists of m bits.)
- 2021-04-28 15:58:44下载
- 积分:1