-
在ＶＨＤＬ上编写了UART通信协议，对于ＦＰＧＡ开发有很大帮助...
在ＶＨＤＬ上编写了UART通信协议，对于ＦＰＧＡ开发有很大帮助-In VHDL on the preparation of a UART communication protocol, for FPGA development of great help
- 2022-01-25 23:42:19下载
- 积分：1
-
multiply
由verilog编写的乘法器，通过两个文件的调用实现。由于子模块的调用使得程序简化了许多。(Prepared by the Verilog multiplier, through the realization of the two documents call. As the sub-modules to simplify the procedure call makes a lot.)
- 2008-12-30 20:51:33下载
- 积分：1
-
vhdl programming from beginner level
vhdl programming from beginner level
- 2022-02-04 01:13:09下载
- 积分：1
-
开发系统上采用的时钟信号的频率是20MHz，可分别设计计数器对其计数，包括计秒、分、小时、日、周、月以及年等。在每一级上显示输出，这样就构成了一个电子日历和时钟...
开发系统上采用的时钟信号的频率是20MHz，可分别设计计数器对其计数，包括计秒、分、小时、日、周、月以及年等。在每一级上显示输出，这样就构成了一个电子日历和时钟的模型。为了可以随意调整计数值，还应包含设定计数初值的电路-Development system using the clock signal frequency is 20MHz, the design can be counter to its count, including seconds, minutes, hours, days, weeks, months and years. At every level to show the output, thus constitutes an electronic calendar and clock models. Can also adjust the order value, should also be included in setting the initial count circuit
- 2022-08-07 06:47:58下载
- 积分：1
-
基于nios ii 驱动altera de1开发板上的lcd和ps2鼠标模块工程
基于nios ii 驱动altera de1开发板上的lcd和ps2鼠标模块工程-based on the nios ii drive the lcd and ps2 module of altera de1 develop board
- 2022-03-12 01:14:50下载
- 积分：1
-
C控制ADC的使用，主要是控制写入，控制状态。
利用c控制adc，主要是控制字写入，状态控制。-C control the use of adc, is mainly controlled write, the state of control.
- 2022-08-17 18:44:11下载
- 积分：1
-
testbench
说明： altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。(altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.)
- 2010-04-22 10:20:24下载
- 积分：1
-
Altera Corporation for DE2 development board of the TV demonstration
用于Altera公司DE2开发板的TV demonstration-Altera Corporation for DE2 development board of the TV demonstration
- 2022-03-26 12:20:58下载
- 积分：1
-
CPLD_PWM
一个在CPLD，EPM70128上实现的PWM控制源程序。(A CPLD, EPM70128 realize the PWM control on the source.)
- 2008-07-25 12:43:39下载
- 积分：1
-
An_enhanced_security_measures_DSP
通过总结当前对处理器架构的安全性能的处理方法，提出一种增强DSP处理器安全性能的方法。主要从并行性方面进行了改进。最后对改进的方法进行了仿真和结果分析。(By summing up the current security architecture of the processor performance approach, a DSP processor to enhance the safety performance of the method. Mainly from the aspects of parallelism to improve. Finally, improved methods and results of simulation analysis.)
- 2009-03-30 11:18:09下载
- 积分：1
