-
TFT_LCD_ASIC_implement
说明： 彩色TFT液晶显示控制电路设计及其ASIC实现(TFT color LCD control circuit design and ASIC realization)
- 2008-10-25 15:11:10下载
- 积分：1
-
8_1
一个具有置位、复位、左移和右移功能的八位移位寄存器/“01011010”序列检测器。移位寄存器电路端口为：异步清零输入端口rst，输入时钟clk，置数判断输入端口load，移位类型判断输入端口m，数据输入端口data[7:0]，输出端口q[7:0]。序列检测器电路端口为：异步清零输入端口rst，输入时钟clk，串行数据输入端口d，输出标志端口s。(A eight bit shift register / 01011010 sequence detector with set, reset, left shift, and right shift function. Shift register circuit port is: Asynchronous Clear input port rst, input clock CLK, set the number to determine the input port load, shift type to determine the input port m, data input port data[7:0], output port q[7:0]. The sequence detector circuit port is: Asynchronous Clear input port rst, input clock CLK, serial data input port D, output flag port s.)
- 2020-12-17 08:29:12下载
- 积分：1
-
bpsk-qpsk
this is bpsk code in matlab
- 2011-10-20 02:49:32下载
- 积分：1
-
codic
8级cordic 算法verilog (8 cordic algorithm verilog)
- 2013-08-21 11:31:46下载
- 积分：1
-
用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中
用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中-VHDL language with the realization of an 8-bit data, and the string conversion, can be downloaded in the FPGA in
- 2022-04-15 10:43:06下载
- 积分：1
-
非常好的SDRAM Controller 设计文档。工程必备
非常好的SDRAM Controller 设计文档。工程必备-SDRAM Controller Design of a very good document. Works required
- 2023-08-30 16:25:04下载
- 积分：1
-
DATA_Scramble
扰码器的FPGA实现，选择的扰码器规格为15位移位寄存器。(FPGA scrambler, scrambler specifications for a 15 bit shift register.)
- 2021-01-16 19:28:46下载
- 积分：1
-
verilog编写的32位浮点加法器
verilog编写的32位浮点加法器-32-bit Floating Point Addition Written in Verilog
- 2022-02-21 08:09:50下载
- 积分：1
-
Altera_lcd_color_bar_117
altera公司飓风四代芯片，LCD屏幕彩条显示，有效实现行、场扫描。练习FPGA驱动VGA或LCD显示的入门程序(Altera hurricane four generation chip, LCD screen color display, the effective realization of line and field scanning.Practice FPGA to drive VGA or LCD display)
- 2017-12-18 11:23:10下载
- 积分：1
-
simpleCpu
relative cpu design implementation
- 2013-08-14 21:22:39下载
- 积分：1
