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kalman filter
图书馆IEEE；
- 2023-04-02 19:00:03下载
- 积分：1
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veriloghdllicheng135li
Verilog的应用例程，包含了基本的硬件编程，加法器，触发器(Application of Verilog routines, including the basic hardware programming, adders, flip-flop)
- 2010-12-14 20:38:03下载
- 积分：1
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JOP kernel, which is the core of the core, the Chinese can not find basic inform...
JOP的内核文件，这是核心的核心，中文资料基本找不到-JOP kernel, which is the core of the core, the Chinese can not find basic information
- 2022-07-20 02:09:37下载
- 积分：1
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ahb_sramc_svtb
ahb总线Verilog代码及sv仿真文件(ahb bus Verilog code and sv simulation code)
- 2021-05-14 14:30:02下载
- 积分：1
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5. For the key to enter a password lock, assuming that reset after the seven lam...
5对于进入密码锁的钥匙，假设复位后七节灯显示为" 0"，而使用sw1、sw2两个，则sw2-> sw1-> sw1-> sw2，则表示解锁右侧将导致七节灯显示为" 8"
- 2023-06-12 23:35:07下载
- 积分：1
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24小时计时时钟
实现24小时计时，因为位数不够，这里是12进位，可自行调整进位数(Realize 24-hour timing, because the number of digits is not enough, here is 12 carry, you can adjust the carry number by yourself.)
- 2020-06-23 19:40:01下载
- 积分：1
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Verilog-SRAM
用verilog hdl语言编写的fpga与片外sram 的读写控制(With the verilog hdl language fpga sram chip with read and write control)
- 2020-12-09 15:39:18下载
- 积分：1
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viterbi213
说明： 编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现，包含整个QuartusＩＩ的工程文件，解码方式为寄存器交换法(Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange)
- 2020-12-27 21:19:02下载
- 积分：1
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ANALYSIS-OF-FULL-ADDER
DESCRIPTION OF FULL ADDER
- 2013-11-12 13:32:19下载
- 积分：1
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cpldfpga
《CPLDFPGA嵌入式应用开发技术白金手册》源代码，涉及FPGA/CPLD的各个方面，键盘扫描，LED扫描等简单程序及滤波器等的设计(" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design)
- 2009-04-20 20:59:16下载
- 积分：1
