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DDR2_XILINX
xilinx FPGA设计需要的DDR2文件,可以应用于实际设计中(xilinx FPGA design needs DDR2 files that can be applied to the actual design)
- 2014-10-09 09:54:05下载
- 积分:1
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buffer for in/out data.
buffer for in/out data.
- 2023-02-22 20:05:04下载
- 积分:1
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Quartus flv configuration and commissioning of the
QUARTUS 的配置及调试
flv的
-Quartus flv configuration and commissioning of the
- 2023-08-05 13:40:04下载
- 积分:1
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VHDL-TESTBENCH
VHDL TESTBENCH书写规范,对学习FPGA的同学很有帮助,掌握仿真语言书写规范。(VHDL TESTBENCH description of the norms, the students learn FPGA helpful, master the language of simulation techniques)
- 2016-12-15 21:33:24下载
- 积分:1
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yangxiaoniu
杨小牛大神的软件无线电,做信道化或者宽带数字接收机的可以下载(Software Radio written by XiaoNiu Yang,people who deal with channelization or wideband digital receiver can download)
- 2016-08-26 16:20:21下载
- 积分:1
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用于FPGA的变长编码算法的HDL编码,包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。...
用于FPGA的变长编码算法的HDL编码,包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-Variable-length encoding for FPGA HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.
- 2022-02-13 17:47:49下载
- 积分:1
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Verilog HDL语言编写的5分频电路。采用两路时钟相逻辑作用产生。...
Verilog HDL语言编写的5分频电路。采用两路时钟相逻辑作用产生。-Verilog HDL prepared by the five-frequency circuits. Clock using two phase logic role.
- 2022-03-28 17:01:44下载
- 积分:1
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ex4
statemachine project for my school
- 2011-12-02 21:07:27下载
- 积分:1
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viterbi213
说明: 编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现,包含整个QuartusII的工程文件,解码方式为寄存器交换法(Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange)
- 2020-12-27 21:19:02下载
- 积分:1
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implementation of fft core using vhdl
本文件是作为超大规模集成电路设计实验室课程(EC354)一部分进行的为期一学期的项目报告。我们的项目是一个4位8点FFT(快速傅立叶变换)核心的完全定制设计。实现的FFT类型是DIF(时间抽取)FFT。
- 2022-04-11 10:12:02下载
- 积分:1