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Verilog HDL language proficiency of a good cpu code
veriloghdl语言熟练的一个很好的cpu代码
- 2022-10-31 00:00:03下载
- 积分：1
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PipelineSim
一个计算机原理课程设计的作业，5级流水线CPU，指令集到代码均为自己设计，有最终报告文档，组建说明，并行除法，16位字长，定长指令，Verilog源代码，顶层设计图。结构简单，冲突解决方式也很简单，代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)
- 2012-06-24 22:19:14下载
- 积分：1
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AHDL
AHDL语言介绍，很详细的介绍AHDL语言介绍，很详细的介绍(AHDL language introduction, a detailed explanation)
- 2009-11-17 15:27:59下载
- 积分：1
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我的学习经验，一种自适应分频及分频方法的实现，很好用的哦...
我的学习经验，一种自适应分频及分频方法的实现，很好用的哦-my learning experience, an adaptive frequency-frequency method and the realization of the good, oh
- 2022-02-03 01:08:00下载
- 积分：1
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CD1_MT9V034_RAW_TRANS
基于FPGA的UDP网络图像传输实验，FPGA完成了MT9V034的RAW图像采集缓存，NIOS完成了图像的UDP封包，DM9000芯片完成了MAC和PHY的功能。(Based on the UDP FPGA network image transmission experiment, FPGA completed the RAW MT9V034 image acquisition cache, NIOS completed the image of the UDP packets, DM9000 chip MAC and PHY completed the function.)
- 2016-07-13 10:11:46下载
- 积分：1
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LMS算法FPGA仿真
自适应滤波器算法LMS ，的FPGA实现，采用VERILOG实现。(LMS, an adaptive filter algorithm, is implemented on FPGA and VERILOG.)
- 2020-06-24 01:00:02下载
- 积分：1
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Divider-vhdl
This is a divider, which is depicted as well.
It is a programming language Vhdl.
- 2013-09-29 18:28:11下载
- 积分：1
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坦克游戏的VHDL代码
坦克游戏用VHDL语言编写。Altera的随身携带套件DE1。PS2键盘接口和VGA
- 2022-03-14 20:16:04下载
- 积分：1
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IEEE Standard for Verilog 2005
IEEE Standard for Verilog 2005
- 2017-06-05 13:53:12下载
- 积分：1
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反设计的VHDL例子，使用QuickLogic ECLIPS
VHDL examples for counter design, use QuickLogic eclips
- 2022-08-25 05:17:29下载
- 积分：1
