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IEEE Standard for Verilog 2005
IEEE Standard for Verilog 2005
- 2017-06-05 13:53:12下载
- 积分:1
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digital_piano-VHDL
使用VHDL编写数字蜂鸣器音乐,整个项目文件,可直接使用
(Use VHDL to write 1602led driver, the entire project file, and can be used directly.)
- 2020-12-27 22:49:03下载
- 积分:1
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2ASK
2ask调制与解调的源代码,经过测试可用(2ask modulation and demodulation source code is available, tested)
- 2012-12-09 21:27:49下载
- 积分:1
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频率计
说明: 1、能正确显示输入信号频率;
2、测量频率范围为1Hz ~ 999999Hz;
3、测量结果以十进制数字显示;
4、能测量幅值较小的信号频率;
5、有自动刷新输出数据的功能(如5s刷新一次);
6、有自检模块(如产生100Hz的校准方波);(1. It can correctly display the input signal frequency;
2. The frequency range of measurement is 1Hz ~ 99999hz;
3. The measurement results are displayed in decimal;
4. It can measure signal frequency with small amplitude;
5. It has the function of automatically refreshing the output data (e.g. once in 5S);
6. Self checking module (such as generating 100Hz calibration square wave);)
- 2020-03-28 16:37:56下载
- 积分:1
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PCIeData-Link-Layer-Specifications
PCIe数据链路层的协议详解,对做PCIe接口有非常重要的指导价值。(PCIe data link layer protocol detailed, do PCIe interface very important value.)
- 2012-08-31 12:33:15下载
- 积分:1
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encode_64_66
自编的64B/66B编码程序,下次上传解码程序。(the 64B/66B coding process is written by myself, i will upload the decoding process next time.)
- 2011-08-27 10:38:53下载
- 积分:1
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vga
利用FPGA控制VGA显示器显示字符汉字的程序,里面有注释。(VGA display with FPGA control procedures Kanji characters, there are comments.)
- 2013-11-25 11:59:13下载
- 积分:1
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spi_slave
FPGA实现SPI接口的从机功能,接收和发送全双工运行,接收到的数据以八位LED灯显示(FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights)
- 2021-01-07 19:28:52下载
- 积分:1
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source_file
说明: 有限状态机 rtl code 和 TB验证环境(Finite state machine RTL code and TB verification environment)
- 2020-08-13 15:05:19下载
- 积分:1
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TS 传输流的同步检测模块,该模块可以完成对输入的ts流的同步头检测和跟踪功能
TS 传输流的同步检测模块,该模块可以完成对输入的ts流的同步头检测和跟踪功能,使用该模块,需要注意的是,工作的时钟频率应该搞于ts流的输入时钟 2 倍以上,这样完成对ts流的低码流到系统时钟频率的转换和同步功能
- 2023-03-20 10:45:04下载
- 积分:1