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8051 kernel (vhdl) This is version 1.1. Of the M C8051 IP core. FPGA operation....
8051的内核(vhdl)
This is version 1.1. of the MC8051 IP core. 在FPGA上运行.供有精力的人研究.-8051 kernel (vhdl) This is version 1.1. Of the M C8051 IP core. FPGA operation. have the energy for the study.
- 2022-03-03 01:17:14下载
- 积分：1
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maxplus2为开发环境 vhdl编写的自由 计数器 程序
maxplus2为开发环境 vhdl编写的自由 计数器 程序-maxplus2 VHDL environment for the development of free counter preparation procedures
- 2022-10-02 01:40:03下载
- 积分：1
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code
adder 18b trong chuong trinh verilog
- 2017-11-26 14:34:56下载
- 积分：1
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fpga_coder_module
本人编写的FPGA光电编码器输入模块,没有实验,但仿真基本实现,希望有参考价值.(FPGA optical encoder input module, there is no experimental, but simulation technology, hope to have reference value.)
- 2021-04-21 01:58:50下载
- 积分：1
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lab12_design_files
des code source vhdl sur fpga
- 2016-03-29 08:09:05下载
- 积分：1
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sram 读写小程序，用verilog编写的，请各位高手指教
sram 读写小程序，用verilog编写的，请各位高手指教-SRAM read and write small programs using Verilog prepared, please enlighten you master
- 2022-07-03 11:53:36下载
- 积分：1
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traffic_lights
交通灯控制器控制红（r）、绿（g）、黄（y）三种不同颜色的交通灯，这三种不同颜色灯的亮、灭分别由三个定时器（timer1、timer2、timer3）控制；
当某个定时器工作时，它所控制的交通灯亮，直到设定的定时时间到（该定时器状态由’0’变’1’），交通灯跳转到另一种状态；
clk是脉冲控制端（图中未标出）；reset是异步复位端，复位状态为红色交通灯亮；
输出端r、g、y分别表示三种颜色交通灯的亮、灭状态。
( traffic light controller control red (R), green (g), yellow (y) three different colors of traffic lights, three different colors of bright lights, off by three timer (Timer1, Timer2, Timer3 ) control When a timer work, it controls the traffic lights, until the set timing (the timer status ' 0 ' for ' 1' ), traffic lights Jump to another state clk is the pulse control terminal (not shown) reset is asynchronous reset terminal, the reset state for the red traffic lights output terminal r, g, y represent the three colors of traffic lights bright, the off state.)
- 2020-12-19 15:09:10下载
- 积分：1
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tcp_tiaoshi
fpga_sopc_enc28j60_tcp_ip_测试，源码程序包，本人测试通过！(Fpga_sopc_enc28j60_tcp_ip_ test, the source code packets, I test through!)
- 2012-03-05 11:26:19下载
- 积分：1
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hdb3
这是一个很全的HDB3译码的verilog程序，用于FPGA入门所用，verilog的入门很好的程序(This is a very wide of the HDB3 decoding verilog program for entry-FPGA used, verilog entry procedures for good)
- 2021-04-22 16:08:48下载
- 积分：1
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sha1_v01
说明： SHA-1加密算法的IP核，内涵文档，仿真测试文件(SHA-1 encryption algorithm of the IP core, the connotation of documents, simulation test file)
- 2008-10-15 09:05:58下载
- 积分：1
