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rs-codec(255-223)
RS编码是一种纠错码,本程序实现RS(255,223)用FPGA 实现RS编码,程序在Quartus II中调试通过。(RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.)
- 2021-05-13 00:30:02下载
- 积分:1
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freq_meter
FPGA的测频程序,用了D触发器,能测1hz到几百hz(FPGA frequency measurement procedures, using a D flip-flop, can be measured to a few hundred hz 1hz)
- 2016-04-03 13:41:48下载
- 积分:1
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ht82v38 线性ccd AD转换fpga程序
ht82v38 线性ccd 16位 AD转换fpga程序VHDLHT82V26(38)是Holtek(隶属台湾盛群半导体股份有限公司)出品的专用于CCD/CIS模拟信号的处理器。当然,其也可做为通用ADC芯片使用。 HT82V38采用3.3V,5V工作电源,采用三个信道的结构(3个ADC输入通道,分别为R、G、B通道),可提供一个、两个或三个信道的操作模式供用户选择,其A/D转换器精度为16位(16bit),转换速率最高达到30MSPS。
- 2022-03-09 21:51:37下载
- 积分:1
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or1200.tar
OpenRISC 1200 cpu with integrated patches to support ORPSOC and FuseSOC builders
- 2014-12-20 04:40:23下载
- 积分:1
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基于FPGA数字频率计
基于FPGA数字频率计,VHDL,quartus,8位频率显示,精确度高
- 2022-03-07 18:22:47下载
- 积分:1
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msk_mod_demod
该程序实现最小频移键控信号的调制解调,经测试无误。(The program implements minimum shift keying signal modulation and demodulation, tested and correct.)
- 2013-10-14 23:02:39下载
- 积分:1
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shuzihongdianlu
数字钟电路的实现,可以24小时计时,可调整时间!(Digital clock circuit implementation, a 24-hour timer, adjustable time!)
- 2013-08-18 14:49:14下载
- 积分:1
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ddr_for_controller_and_phy
说明: 这是本人曾经参与的一个DDR controller接口项目,主要是FPGA rtl实现,仅供参考。(This is a DDR controller interface project that I once participated in, mainly implemented by FPGA RTL, for reference only.)
- 2020-12-21 20:59:08下载
- 积分:1
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18B20PLCD
温度液晶显示演示程序
LCD数据线:P0口
LCD控制线:RS P20 RW P21 E P22 BUSY P07
18B20端口DQ :P27
(Temperature of liquid crystal display demo
Data line: P0 LCD
LCD RS P20 RW P21 control line: E P22 BUSY P07
18B20 DQ : P27 port
)
- 2011-12-03 23:04:34下载
- 积分:1
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LMS_filter
这是自适应滤波器,使用verilog代码来编写的,已通过了仿真,效果很好。希望能给大家好好分享!(This adaptive filter verilog code to write, through a simulation, with good results. I hope to give a good share!)
- 2020-12-08 21:19:19下载
- 积分:1