-
SPI_test
用FPGA于32进行SPI单向通信,FPGA向32放松发送数据(One-way SPI communication is carried out in 32 with FPGA, and data is sent to 32 with ease by FPGA.)
- 2020-06-18 10:40:02下载
- 积分:1
-
shift_reg
Shift reg in vhdl, a first example to start
- 2011-03-27 10:35:25下载
- 积分:1
-
DE1 SOC D5M两相机
应用背景两个摄像头,一个FPGA。相机都可以显示在VGA显示器采用开关[ 5 ]。关键技术ccd_capture V / V。i2c_ccd_config V / V。i2c_controller V / V。raw2rgb V / V。seg7_lut V / V。vga_controller V / V。
- 2022-09-14 14:45:03下载
- 积分:1
-
yiweijicunq
说明: 16位右移位寄存器
下面描述的是一个位宽为16位的右移位寄存器,实际具有环形移位的功能,是在右移位寄存器的基础上将最低位的输出端接到最高位的输入端构成的。其功能为当时钟上升沿到达时,输入信号的最低位移位到最高位,其余各位依次向右移动一位。(16-bit right shift register
The following description is a right shift register with a bit width of 16 bits. It actually has the function of circular shift. It is based on the right shift register, which connects the lowest bit output terminal to the highest bit input terminal. Its function is that when the rising edge of the clock arrives, the lowest displacement of the input signal reaches the highest position, and the rest of you move one bit to the right in turn.)
- 2020-08-18 09:58:21下载
- 积分:1
-
decoder_38
这是基于Quartus2 开发环境和verilog hdl语言写的38译码器(This is based development environment and Quartus2 verilog hdl language used to write decoder 38)
- 2013-08-04 09:53:07下载
- 积分:1
-
VGA_yanse
用fpga实现VGA16色真彩的图片显示,且在AX301实验板上已经调试过(VGA16 achieve true color with fpga pictures show, and in the AX301 has been tuned breadboard)
- 2021-02-05 17:59:57下载
- 积分:1
-
用Verilog做的SD卡控制器(有详细的注释)
说明: SDIO 接口,实现SD卡的控制器功能,带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)
- 2020-06-16 22:00:01下载
- 积分:1
-
简单的32位RISC CPU内核
我是在韩国仁荷大学学生。这是项目结果的计算机体系结构。它的 CPU 核心,32 位 RISC 系统。它可以在 300 MIPS opreated。1cycle / 1instruction 系统。它提出简单的哈佛架构。和做简单的算术逻辑。
- 2022-01-28 09:03:42下载
- 积分:1
-
simple_cpu
初学cpu结构的很好的verilog代码的示例,适合初学者(novice cpu structure of the good verilog code examples for beginners)
- 2007-03-03 01:05:16下载
- 积分:1
-
AD9250 204b Verilog源码
说明: AD9250是一款双通道14位ADC,最高采样速率250 MSPS,JESD204B Subclass 0或Subclass 1编码串行数字输出(The ad9250 is a dual channel 14 bit ADC with a maximum sampling rate of 250 MSPs and jesd204b sub class 0 or sub class 1 coded serial digital output)
- 2021-04-14 11:01:55下载
- 积分:1