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14_SDRAM
说明: 高速流水的SDRAM控制器,最高速度可达速度在200M左右(high speed SDRAM controller)
- 2019-06-17 18:43:54下载
- 积分:1
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NIOS_TIMER
很不错的资源哦,这是我在实验室当年总结的关于nios timer的程序段(nios timer)
- 2014-06-18 09:13:42下载
- 积分:1
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cordic_atan
说明: 用verilog语言实现计算反正切函数,在软件无线电中解调PM/FM中使用的尤为频繁。上传的压缩包是modelsim工程,基于6.5c,里边包含一个完整的PM波产生以及解调过程的matlab文件仿真,并取其中间的I和Q支路做为verilog文件的输入,并将其借条输出与MATLAB实际解调输出作比较。
鉴相器的设计基于CORDIC算法,其精度取决于迭代的深度。由于工程实际运用只需要解调出atan值,并不需要绝对的值,所以并没有给予加权,需要的同学可以自己加上。(Calculated using verilog language arc tangent function, the software radio demodulation PM/FM is particularly used frequently. From the archive is modelsim project, based on 6.5c, inside the PM contains a complete demodulation process of wave generation and simulation matlab file, and whichever is the middle of the I and Q branch verilog file as input, and its IOU demodulated output and actual output of MATLAB for comparison. Phase detector design is based on CORDIC algorithm, its accuracy depends on the iteration depth. As the practical application of engineering demodulated atan value only and does not need absolute value, and there is no weight given to the need of the students can add their own.)
- 2010-04-07 16:30:47下载
- 积分:1
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mu0
基于Xilinx Spartan6的
一个简单的CPU MU0
VHDL(Based on a simple CPU Xilinx Spartan6 of MU0 VHDL)
- 2020-12-07 08:29:22下载
- 积分:1
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用于实现两个数相加的vhdl代码,在相应的编译器中使用
用于实现两个数相加的vhdl代码,在相应的编译器中使用-used to achieve the two summed VHDL code, the corresponding use of compiler
- 2022-10-30 11:05:03下载
- 积分:1
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CORDIC的资源
说明: NCO生成原理接介绍、CORDIC算法原理介绍以及MATLAB与Verilog语言实现(Introduction to NCO generation principle)
- 2020-01-03 13:57:22下载
- 积分:1
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Verilog HDL编写的总线功能模型,十分有用,需要的下载
Verilog HDL编写的总线功能模型,十分有用,需要的下载-Verilog HDL prepared by the bus functional model is useful, it needs to download
- 2022-03-20 19:48:39下载
- 积分:1
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SinglePeriodCPU
说明: verilog语言书写,单周期CPU源码(single period CPU)
- 2020-11-25 11:59:32下载
- 积分:1
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一个8位CISC结构的精简CPU,2还提供了编译器
一个8位CISC结构的精简CPU,2还提供了编译器-an eight streamline the structure of the CISC CPU, the two also provided compiler
- 2022-02-28 11:37:41下载
- 积分:1
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fpga VHDL语言,控制DDS产生频率可变的正弦波信号扫频
fpga VHDL语言,控制DDS产生频率可变的正弦波信号扫频-FPGA VHDL DDS
- 2022-06-29 15:53:56下载
- 积分:1