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src
说明： 假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 + 寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)
- 2020-12-15 13:49:14下载
- 积分：1
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- 2022-05-01 00:03:25下载
- 积分：1
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LVDS-application-Verilog-HDL-code
LVDS的应用的Verilog HDL例子程序(LVDS example of the application procedures for the Verilog HDL)
- 2011-09-30 20:24:02下载
- 积分：1
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DDC
说明： 数字下变频verilog实现，项目中常用模块(apply the digital down frequency in my project)
- 2020-12-08 11:29:20下载
- 积分：1
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xc2s100E FPGA的原理图
给想涉足FPGA的新人参考
xc2s100E FPGA的原理图
给想涉足FPGA的新人参考-xc2s100E FPGA schematic diagram of the FPGA would like to set foot in the new reference
- 2023-05-12 14:50:04下载
- 积分：1
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adder32
原理图输入法制作的32位加法器。。。。。。。。(adder32)
- 2009-12-29 19:32:52下载
- 积分：1
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arbitrary data source code generator
任意数据发生器的源代码-arbitrary data source code generator
- 2023-02-11 05:20:03下载
- 积分：1
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sch_tbf
Token Bucket Filter queue.
- 2013-05-06 11:34:24下载
- 积分：1
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人脸识别（3D）
基于高清视频的3D人脸识别源代码，四万多行，经过FPGA实际验证，最近调试完毕。(The source code of 3D face recognition based on HD video, more than 40,000 lines, has been verified by the actual FPGA, and has been debugged recently.)
- 2019-07-01 16:22:46下载
- 积分：1
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-双路高速AD(AD9226)模块板发行资料
其中包括AD9226的原理图和应用程序，可以参考完成其他编程(Including AD9226 schematics and applications, you can refer to complete other programming)
- 2020-12-06 21:09:21下载
- 积分：1
