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这是一个基于VHDL语言编程的电子琴源代码程序，希望可以帮到大家...
这是一个基于VHDL语言编程的电子琴源代码程序，希望可以帮到大家-This is a keyboard based on the VHDL programming language source code program, the desire to help everyone
- 2023-02-07 16:15:03下载
- 积分：1
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a2
说明： 用MATLAB设计及FPGA实现IIR滤波器的方法
摘要 本文介绍了IIR数字滤波器的传统设计思想与步骤及计算机辅助设计方法。并在FPGA上高效实现的低阶IIR滤波
器，其阶数低，实时响应快，适合雷达等的实时、高效处理环境。利用IIR滤波器的多相结构来实现该滤波器系统的方法，对于
四通道的情形在MATLAB上利用Simulink作了仿真, 并在目标板上对算法进行了实现,证明该系统能够同时处理四个通道的信号。(Using MATLAB Design and FPGA realization IIR Filter method Abstract This paper introduces IIR digital filter traditional design Thought and steps and CAD method. And FPGA on efficient realization low IIR filter, its order low, real response fast suitable radar real time, efficient processing environment. Use IIR filter multiphase structure realize the filter systematic method, for four channel circumstances in MATLAB on use Simulink made simulation and target board algorithm was realized proved system can simultaneously four channel signal.)
- 2010-04-01 17:10:21下载
- 积分：1
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6
说明： 4位数码扫描显示电路,我们控制一个七段LED需要8个输出端口；如果要输出四位十进制数，就需要32的输出端口，这将占用大量的端口资源。采用串行扫描显示，我们只需要8+4共12个端口即可。其原理是：用一个四位的输出端控制，某一时刻只选中其中的一个LED（输出为‘1’表示选中），八位的输出端将该LED所需要显示的值输出；然后四位的输出端值改变，选中下一个LED。这样依次类推。如果选择的频率很快，达到50Hz以上，由于人眼的视觉暂留效应，看起来就像4个LED同时显示。
设计一个程序，输入四个一位十进制数，用4个LED显示出来。CLK采用频率可调信号发生器，逐渐改变频率，观察扫描频率的改变对输出效果的影响。
输入：连续脉冲，逻辑开关；输出：七段LED。
(4 digital scanning display circuit, we need to control a seven-segment LED output port 8 If you want to output four decimal numbers, you need the output port 32, which will take up a lot of ports. Serial scans showed, we need only 8 of 12 ports can be+4. The principle is: the output of four with a control, a time to select only one LED (output 1 is selected), 8 output of the LED by the need to show the value of the output then The output value of the four changes, select the next LED. This and so on. If you select the frequency rapidly, reaching more than 50Hz, as the human eye s persistence of vision effect, looks like a 4 LED display simultaneously.
Design a program, enter a decimal number four, with four LED display. CLK signal generator with adjustable frequency, gradually changing the frequency of observed changes in scan frequency effect on the output.
Input: Continuous pulse, logic switches output: seven-segment LED.)
- 2010-06-21 22:07:59下载
- 积分：1
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fpga1394
这是一段控制1394芯片的cpld的verilog程序,可以参考,在实际项目中已经采用.(This is a control chip cpld 1394 Verilog the procedures, they can refer to the actual project has been adopted.)
- 2005-03-31 16:09:51下载
- 积分：1
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verilog编写的alu模块
verilog编写的alu模块-Verilog modules prepared by the ALU
- 2022-11-20 13:50:03下载
- 积分：1
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OFDM-based-on-FPGA
用FPGA实现OFDM系统，硬件语言为Verilog，环境为xilinx，详细介绍了接收机和发射机各个模块的源代码(OFDM system with a FPGA implementation, hardware language Verilog, environment xilinx, details of receiver and transmitter modules source code)
- 2015-05-11 08:58:13下载
- 积分：1
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NiosII _练习_ ver3 NiosII for旋风，这3。
NiosII_Exercises_Ver3,this niosII 3.o for cyclone
- 2023-08-22 22:50:04下载
- 积分：1
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SPWM
FPGA上用verilog写的SPWM控制程序，完美运行！自由调试，毕设内容，十分宝贵(The SPWM control program by verilog FPGA perfect run! Free commissioning, Bi-based content, invaluable)
- 2013-05-05 21:36:10下载
- 积分：1
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是用VHDL语言写的对A/D转换模块的控制程序，希望对大家有帮助。...
是用VHDL语言写的对A/D转换模块的控制程序，希望对大家有帮助。-VHDL language is used on the A/D conversion module control procedures, in the hope that everyone has to help.
- 2023-05-25 06:40:03下载
- 积分：1
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VHDL源代码包
VHDL源代码包-VHDL source code
- 2022-05-22 07:07:38下载
- 积分：1
