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MAC
在FPGA硬件上，使用verilog语言编写的一个乘累加器程序。(FPGA hardware, a multiply accumulator verilog language program.)
- 2012-10-18 20:28:25下载
- 积分：1
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altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中...
altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
- 2022-12-14 08:55:03下载
- 积分：1
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grlib-gpl-1.1.0-b4108
gaisler公司在2011年发布的的leon3的源代码！(source code of leon3 )
- 2012-05-12 00:12:20下载
- 积分：1
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fpga
FPGA代码，包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择
(FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection)
- 2015-11-18 10:47:22下载
- 积分：1
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truck_lights
Lights, Car light emulator for turn, stop and emergency
- 2012-11-06 18:27:06下载
- 积分：1
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main
EP2C35A实验箱基于NIOSII的串行AD_DA编程(EP2C35A experimental box based NIOSII the serial AD_DA programming)
- 2013-04-22 11:18:27下载
- 积分：1
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the transmitter and receiver modules for serial communication
the transmitter and receiver modules for serial communication
- 2022-07-22 02:02:39下载
- 积分：1
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Verilog HDL语言的快速参考指南
quick reference guide to verilog HDL
- 2022-10-28 05:20:03下载
- 积分：1
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vga
说明： 实现在屏幕上显示绿色和红色相间的水平条纹。其中，vga_640x480模块将产生行同步信号hsyn和场同步信号 vsync; vga_stripes模块将产生red、green和blue三个输出。(The horizontal stripes of green and red are displayed on the screen. Among them, vga_640x480 module will produce line synchronization signal Hsyn and field synchronization signal vsync; vga_stripes module will produce red, green and blue three outputs.)
- 2020-06-24 02:00:02下载
- 积分：1
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VHDL程序
利用QuartusⅡ6.0对所设计的出租车计费器的VHDL代码进行仿真，并在FPGA数字实验系统上实现了该控制。(The Quartus II 6 is used to simulate the VHDL code of the designed taxi billing device, and the control is realized on the FPGA digital experiment system.)
- 2017-12-14 12:35:23下载
- 积分：1
