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sdi_audio
sdi音频嵌入及解嵌代码,代码使用Verilog HDL语言(SDI audio embedding and decoding code, the code using Verilog HDL language)
- 2020-12-01 19:29:26下载
- 积分:1
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VMD642_CPLD
本例程位于 VMD642_CPLD目录中。
使用 CPLD 实现辅助译码、LED 指示灯控制、看门狗等各种逻辑控制电路。源程序使
用 Verilog HDL书写,编译开发系统使用 Cypress公司的 Warp 6.3。(This routine is located VMD642_CPLD directory. Using CPLD implementation auxiliary decoding, LED indicator control, watchdog, and other logic control circuitry. Written using Verilog HDL source code, the compiler development system using Cypress' s Warp 6.3.)
- 2013-09-13 13:59:52下载
- 积分:1
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I write the digital phase
本人写的数字锁相环,有模拟数据,学习锁相环很好的材料。参考书“数字锁相环路原理与应用”编写。-I write the digital phase-locked loop, have simulated data, a good phase-locked loop learning materials. Reference book
- 2023-04-23 05:25:03下载
- 积分:1
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OFDM-Verilog
基于FPGA的OFDM的实现,Verilog语言。(OFDM based on FPGA,by Verilog)
- 2021-02-03 20:59:58下载
- 积分:1
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docs
papers based on distributed arithmetic.
- 2014-02-06 16:17:09下载
- 积分:1
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CPU-Verilog
说明: 简单流水线CPU,使用 verilog实现,实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)
- 2020-06-23 19:40:01下载
- 积分:1
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PCIE资料和仿真教程1-6
PCIE仿真设计教程1-6,我帮大家收集到一起了(PCIE simulation design tutorial 1-6, I help you gather together.)
- 2020-11-09 19:29:46下载
- 积分:1
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扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现
扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现-Frequency-hopping communication QUARTUS7.0 expanded development environment in the VHDL source code and the achievement of the overall block diagram
- 2023-08-17 13:20:04下载
- 积分:1
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实现PWM波型....使用VHDL语言
实现PWM波型....使用VHDL语言-Realization of PWM waveform using the VHDL language ....
- 2022-09-10 03:00:02下载
- 积分:1
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bayer_3RGB_interpolation
一个基于FPGA用verilogHDL设计的bayer格式转RGB格式的模块,本人设计(a code used for bayer_3RGB_interpolation ,which based on FPGA by verilogHDL)
- 2011-12-25 21:58:05下载
- 积分:1