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Tuart_tx_rxh
该工程用verilog编写，已通过串口调试助手调试通过，接收模块采采用8倍波特率采样数据，有较好的滤波功能，在PC上完成自发自收功能。
(The project is written in verilog debugging through serial debugging assistant, adopted 8 times the baud rate sampling data receiver module, better filtering done on the PC spontaneous self-closing function.)
- 2012-08-26 10:39:49下载
- 积分：1
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Hamming
汉明码转换，在FPGA上用verilog实现(hamming encoder, using FPGA)
- 2011-05-22 09:46:09下载
- 积分：1
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failed to translate
用于FPGA实现单总线测温电阻DS18b20时序。在xilinx spartan 3中试过。-failed to translate
- 2022-01-20 22:48:28下载
- 积分：1
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pid_controler_latest.tar
PID控制器的verilog实现，做闭环控制器的人可以参考(PID controller verilog implementation of closed-loop controller may make reference to)
- 2010-10-23 17:09:15下载
- 积分：1
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实现spi接口的传输，并多外接EEPROM读写数据
实现spi接口的传输，并多外接EEPROM读写数据-Spi interface to achieve the transfer, and multiple external EEPROM read and write data
- 2022-02-06 14:13:33下载
- 积分：1
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跑马灯led_horse vhdl cpldfpga
跑马灯led_horse vhdl cpldfpga-led_horse vhdl cpldfpga
- 2022-12-03 00:40:03下载
- 积分：1
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DW8051_ALL
包中包括,
DW8051完整的Verilog HDL代码
两本手册:
DesignWare Library DW8051 MacroCell, Datasheet
DesignWare DW8051 MacroCell Databook
三篇51论文:
基于IP 核的PSTN 短消息终端SoC 软硬件协同设计
Embedded TCP/ IP Chip Based on DW8051 Core
以8051为核的SOC中的万年历的设计 (DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and its testbench, and it worked all right!)
- 2021-05-07 09:28:36下载
- 积分：1
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RFID
RFID防碰撞算法的研究，以及对其各种算法的仿真，以及改进算法的仿真和比较。(RFID anti-collision algorithm, as well as its simulation algorithms, and improved simulation and comparison algorithms.)
- 2020-12-03 09:59:25下载
- 积分：1
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供大家学习以太网VHDL和Verilog代码
以太网的vhdl和verilog代码，供大家学习-Ethernet VHDL and Verilog code for everyone to learn
- 2022-08-21 10:09:17下载
- 积分：1
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VHDL
带有异步清零、异步置位功能的边沿JK触发器(With asynchronous reset, asynchronous setting function of edge JK flip-flop)
- 2020-06-30 03:00:02下载
- 积分：1
