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这是我在学习过程中编的数字钟的原程序,含各种时钟模块,以及计数器,累加器等,可以直接下载,已经编译通过!...
这是我在学习过程中编的数字钟的原程序,含各种时钟模块,以及计数器,累加器等,可以直接下载,已经编译通过!-This is my learning process in the middle of the 10-minute program, containing various clock module and the counter, accumulator, and can download, compile!
- 2022-07-19 00:32:21下载
- 积分：1
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小波变换去噪vhdl
基于小波变换去噪，采用了vhdl编写，已经在和matlab上对比过，结果准确，而且大量的节约了时间，欢迎下载，可以在quartusii中查看RTL电路，可以在modesim中仿真出结果
- 2022-02-20 11:22:37下载
- 积分：1
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amba3-vip-master
说明： All AMBA bus protocols - AXI3, AXI4, AXI4-Lite, ACE, AHB
- 2021-01-11 10:08:49下载
- 积分：1
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四位数字乘法器，在quartus8.0下仿真时序图
四位数字乘法器，在quartus8.0下仿真时序图 -mult4
- 2023-09-04 20:20:03下载
- 积分：1
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128点 基8 FFT
使用Verilog语言对128点 基8FFT的实现(Implementation of 128-point basis 8FFT)
- 2018-11-29 14:39:32下载
- 积分：1
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流水线乘法器的VHDL实现，希望对你会有用！
流水线乘法器的VHDL实现，希望对你会有用！-Pipelined multiplier in VHDL implementation, you will want to use!
- 2023-04-03 22:35:03下载
- 积分：1
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multiply
由verilog编写的乘法器，通过两个文件的调用实现。由于子模块的调用使得程序简化了许多。(Prepared by the Verilog multiplier, through the realization of the two documents call. As the sub-modules to simplify the procedure call makes a lot.)
- 2008-12-30 20:51:33下载
- 积分：1
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test_utils.tar
GPIO LED 测试工具源代码，可以用来检测开发的主板GPIO LED设备是否工作正常(GPIO LED test tool source code, can be used to detect the development of motherboard GPIO LED device is working properly)
- 2012-10-23 10:20:56下载
- 积分：1
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MP3-coder
In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder.
Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them
includes all the VHDL source codes of the component.)
- 2013-08-06 15:40:24下载
- 积分：1
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lab12_design_files
des code source vhdl sur fpga
- 2016-03-29 08:09:05下载
- 积分：1
