-
数字计时器,使用VHDL语言编写,使用数码管显示,精确到ms
数字计时器,使用VHDL语言编写,使用数码管显示,精确到ms-digital timer, the use of VHDL development, the use of digital control, the precision of the ms
- 2022-05-20 00:23:22下载
- 积分:1
-
lpddr2
LPDDR2 SDRAM memories compliant to JEDEC JESD209-2.
- 2015-05-11 20:57:21下载
- 积分:1
-
Design-of-taxi-meter-Based-on-FPGA
本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式;并对这两种实现方式的优点和缺点进行分析,比较后确定本系统的方案:基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)
- 2011-05-11 15:38:37下载
- 积分:1
-
源实现YUV到RGB的转换
THE SOURCE REALIZE THE TRANSFORMATION FROM YUV TO RGB
- 2022-06-16 04:19:46下载
- 积分:1
-
波形发生器,用于编写testbentch文件。非常实用
波形发生器,用于编写testbentch文件。非常实用-Waveform generator, for the preparation of testbentch files. Useful
- 2022-10-22 19:55:04下载
- 积分:1
-
CH372
USB设备接口的驱动程序,采用verilogHDL语言编写,并包含相关说明资料(USB device driver interface, using verilogHDL language, and contains descriptive information)
- 2014-01-03 02:23:08下载
- 积分:1
-
Aluno
Example of programming fifo in c
- 2013-01-17 00:23:28下载
- 积分:1
-
virtex7_pcie_dma
FPGA开发PCIe的源码,采用VHDL语言,通过此源码,能更好的掌握PCIe总线,使开发者少走弯路,
- 2023-01-25 04:55:04下载
- 积分:1
-
static-timing-analyze
特权同学主讲的FPGA设计的时序约束专题(STA部分)(Speaker privileged classmates timing constraints for FPGA design topics (STA section))
- 2013-07-11 13:23:46下载
- 积分:1
-
电子手表
在硬件上实现,可以实现一般电子表的功能。比如说计时,显示日期,秒表等功能。还可以显示星期数,可以正常的区分闰年等。并且仿真文件也在其中,反正了其时序变化情况。比较详细。必要出有注释。
- 2022-07-08 11:11:12下载
- 积分:1