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cpu_code_8051
vhdl code for 8051 processor
- 2010-06-25 15:16:07下载
- 积分:1
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FIR低
fir低通滤波器 用于dspbuilder pll:25ns data 400khz sin 10.8khz-fir low-pass filter for dspbuilder pll: 25ns data 400khz sin 10.8khz
- 2023-05-01 00:45:03下载
- 积分:1
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Using FPGA realize DDS, can be frequency, amplitude from hardware to complete
用FPGA实现DDS,可变频,幅值由硬件完成-Using FPGA realize DDS, can be frequency, amplitude from hardware to complete
- 2022-04-02 05:52:39下载
- 积分:1
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DigitalClock
数字钟:实验中用到的小程序,用于万年历中的模块(Digital clock: a small program used in the experiment, the modules for calendar)
- 2013-05-26 09:25:23下载
- 积分:1
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1. For the key input, please join the voice output circuit, representing the key...
1对于按键输入,请加入语音输出电路,代表按键sw1反馈的音频信息。每次按下sw1按钮时,它们都会发出0.1秒1KHz的声音。
- 2022-03-02 14:32:00下载
- 积分:1
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CY7C63723
CY7C63723 功能及其引脚描述,外围电路和仿真数据(The CY7C637 is an 8-bit RISC OTP microcontroller.)
- 2009-07-13 14:30:05下载
- 积分:1
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Rabaey---Digital-Integrated-Circuits-2e-(Prentice
imp book for cmos technology
- 2015-04-10 15:39:16下载
- 积分:1
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LCD1602
通过编写verilog语言完成数据的在液晶LCD1602显示(By writing verilog language to complete the data displayed on the LCD LCD1602)
- 2013-08-04 13:12:05下载
- 积分:1
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基于IIC的EEPROM模型代码
说明: 基于IIC协议的EEPROM模型,可实现串行数据转并行数据,并行数据转串行数据,分为EEPROM模块,EEPROM_WR模块,signal模块,Top模块(The EEPROM model based on IIC protocol can convert serial data to parallel data and parallel data to serial data. It is divided into EEPROM module and EEPROM module_ WR module, signal module, top module)
- 2020-10-02 00:30:24下载
- 积分:1
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三种方法编写多路选择器的VHDL源代码
分别使用if else ,select ,when 语句...
三种方法编写多路选择器的VHDL源代码
分别使用if else ,select ,when 语句-three methods to prepare multiple choice of VHDL source code were used if else, select, when words
- 2023-02-04 23:35:03下载
- 积分:1