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responder3
说明： 基于VHDL的多路抢答器，用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)
- 2019-06-17 15:29:31下载
- 积分：1
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omp
用于压缩感知 OMP 算法非常适合于压缩感知
- 2022-02-25 10:12:51下载
- 积分：1
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[verilog]dcfifo_256x32
双时钟域FIFO(This is self-defined Dual-Clock FIFO, using logic lut resources.
Dual-Clock FIFO,
Depth: 256
Width: 32
USEDW: Y
FULLL:Y
EMPTY:Y)
- 2017-05-10 13:25:41下载
- 积分：1
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EDA very important small procedures to ensure that key reliability and prevent j...
EDA中很重要的小程序，保证按键可靠性，防止抖动误差信号产生，外部信号输入时必用此消抖函数-EDA very important small procedures to ensure that key reliability and prevent jitter error signal generated, the external input signal must use this function Consumers shiver
- 2022-02-13 11:15:40下载
- 积分：1
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show frequency measurement, external 24MHz crystal oscillator, the data show tha...
显示频率测量，外接24MHz晶振，显示数据为三位，分四个档来测量-show frequency measurement, external 24MHz crystal oscillator, the data show that three, four hours to measure stalls
- 2022-03-16 13:33:43下载
- 积分：1
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含移动储能单元的微网优化调度模型研究_吴婷
含移动储能的分布式电能优化调度，模型的处理与改进(Processing and improvement of distributed power optimization scheduling with mobile energy storage)
- 2018-10-17 10:18:53下载
- 积分：1
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Divider can be very good VHDL divider realize the function of great help for beg...
除法器,可以很好的实现VHDL除法器的功能对于初学者有很大帮助.
-Divider can be very good VHDL divider realize the function of great help for beginners.
- 2022-04-21 12:12:32下载
- 积分：1
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自己写得一个关于sine（32X24）的程序
自己写得一个关于sine（32X24）的程序-own written on a sine (32X24) procedures
- 2022-02-28 22:21:58下载
- 积分：1
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altera-de2-ann
基于VHDL+FPGA的神经网络设计，实现简单的字符识别(Design of Neural Network Based on VHDL+FPGA to Realize Simple Character Recognition)
- 2018-12-01 08:06:02下载
- 积分：1
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Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核...
Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear
- 2022-02-06 18:05:18下载
- 积分：1
