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三态以太网verilog代码
10_100_1000 Mbps tri-mode ethernet MAC implements a MAC controller conforming to IEEE 802.3 specification. It is designed using less than 2000 LCs/LEs to implement full function. It will use inferred PADs to reduce technology dependancies. The whole project will be finished in TEN weeks inluding verilog coding,RTL level verification.
A GUI configuration interface,created by tcl/tk script language,is convenient for configuring optional modules,FiFo depth and verifcation parameters. Furthermore,a verifcation system was designed with tcl/tk user interface,by which the stimulus can be generated automatically and the output packets can be verified with CRC-32 checksum.
- 2023-06-19 02:05:04下载
- 积分:1
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RX_RS_DEC
OFDM系统新型RS编解码的verilogHDL设计,经测试误码率性能提高(OFDM system verilogHDL new RS codec design, improved bit error rate performance tested)
- 2020-12-31 10:59:00下载
- 积分:1
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无线发射模块的 SRRC 成型匹配滤波设计 Verilog 代码
无线发射模块的 SRRC 成型匹配滤波设计 Verilog 代码,包含了所有测试,主模块,可以用在基带调制端,滤波器的滚降系数0.10~0.25,如果那些没有做过这方面的朋友,可以看看实现,和方法,提供一个参考和帮助
- 2022-11-23 08:55:03下载
- 积分:1
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12_lcd12864
本实验是用LCD12864显示英文
显示
Our FPGA EDA
NIOS II
SOPC
FPGA(This experiment is shown in English with LCD12864 display Our FPGA EDA NIOS II SOPC FPGA)
- 2013-06-26 11:35:54下载
- 积分:1
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tPad_Camera
tPad DE2-115/70开发板可用的摄像头采集、显示程序,QT10.0以上环境可用,原装代码,可以进行修改加以使用,如使用到倒车影像系统中,视频显示等。(tPad DE2-115/70 development board available cameras capture, display program, QT10.0 over the environment is available, the original code can be modified to be used, such as the use of the reversing video system, the video display.)
- 2020-07-09 19:58:55下载
- 积分:1
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Multiplier
A multiplier unit in VHDL
- 2010-01-05 11:42:02下载
- 积分:1
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HUAWEI_FPGA
华为内部资料,华为FPGA全套资料,包括华为的专利设计(Internal information Huawei Huawei FPGA complete information, including Huawei' s patented design)
- 2020-12-21 18:19:08下载
- 积分:1
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nios2_led_one
使用nios2点亮一个led灯,使用软件quartus13.0,开发板de2-115(nios2 led quartus13.0 de2-115)
- 2013-12-11 14:32:16下载
- 积分:1
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32 位 MIPS ALU 设计
这是简单的32位ALU的MIPS。它提供了五种操作如AND,OR,ADD,减去,SET不到。并且它具有32位的两个输入和32位的一个输出。并且它具有操作的检查溢出时,ADD或减去。
- 2022-03-15 15:13:03下载
- 积分:1
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cordic
基于VHDL语言编写,可下载到FPGA板子上实现的cordic算法实现的设计,并用该算法实现sin和cos的计算,计算结果显示在数码显示管上,已包含按键防抖动功能的实现。(Based on VHDL language, can be downloaded to the the cordic algorithm implemented in the FPGA board to achieve the design and calculation of sin and cos using this algorithm, the results displayed on the digital display tube is included on the function of the realization of the button shake.)
- 2013-03-21 16:52:41下载
- 积分:1