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FPGA开发板上实现秒表计数器功能
这是我上大三时的电子设计题目,叫秒表的功能实现。利用ISE软件进行编程,代码是VHDL语言的,可以实现时(0-9)分(0-59)秒(0-59)即最大10小时的计数,对于不同开发板,可以适当修改代码,使之成为更加广泛的计数器。代码纯原创,请下载。
- 2023-01-08 12:35:04下载
- 积分:1
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CCD
本设计主要用来进行图像采集处理,通过摄像头采集图像信息,经过插值算法后存储到外部SDRAM,然后读取图像数据,进行边缘滤波处理后经VGA输出到屏幕上。(This design is mainly used for image acquisition and processing,through the camera capture image information,after interpolation to the external memory after the SDRAM,and then read the image data processed by the edge filter VGA output to the screen.)
- 2021-05-14 18:30:03下载
- 积分:1
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LS165
LS165移位寄存器的verilog语言编写(The writing of the Verilog language of LS165 shift register)
- 2020-11-22 22:59:34下载
- 积分:1
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iic_sci
FPGA编程,经过团体奋战完成,全是底层的IIc和sci通信,完整版。(FPGA programming, after groups fight to the finish, all underlying SCI and IIc communication, full version)
- 2014-12-23 09:32:54下载
- 积分:1
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RS_5_3_CODEC
完成RS(5,3)编码程序,运用Verilog语言。(Complete the RS (5,3) coding process, the use of Verilog language.)
- 2010-05-25 21:21:34下载
- 积分:1
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dac
简易函数发生器,能产生正弦波,三角波,梯形波,方波,并且可调频率和幅度值。(Simple function generator can produce sine, triangle wave, trapezoidal wave, square wave, and the adjustable frequency and amplitude values.)
- 2011-08-28 14:11:37下载
- 积分:1
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FPGA
verilog编写的QPSK发射机的FPGA部分,已经过验证,完全达到要求。调制矢量误差4%(QPSK transmitter verilog prepared by the FPGA portion, has been proven, fully meet the requirements. Modulation vector error of 4 )
- 2013-10-08 14:58:23下载
- 积分:1
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main
EP2C35A实验箱基于NIOSII的串行AD_DA编程(EP2C35A experimental box based NIOSII the serial AD_DA programming)
- 2013-04-22 11:18:27下载
- 积分:1
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使用LPM_ROM的实际的例子
使用LPM_ROM的实际的例子-Use of practical examples LPM_ROM
- 2022-10-03 13:00:03下载
- 积分:1
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flv的vhdl教学文件:在线调试
自己慢慢欣赏吧
flv的vhdl教学文件:在线调试
自己慢慢欣赏吧-flv file of VHDL Teaching: Online debug their慢慢欣赏吧
- 2022-05-22 02:55:52下载
- 积分:1