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SAP
SAP-1硬件描述语言(使用Verilog语言)
- 2023-06-14 11:45:03下载
- 积分:1
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加法器的VHDL实现
本资源包括了加法器的VHDL代码实现,供大家学习。
- 2022-11-01 21:40:03下载
- 积分:1
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QAM
OFDM中的16QAM星座映射的实现实现详细代码(In OFDM 16QAM constellation mapping to achieve the realization detailed code)
- 2021-03-11 17:59:25下载
- 积分:1
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key_xiaodou
说明: 该资料是用vhdl编写的按键消抖程序,按键消抖在使用按键的数字电路中非常重要,如果不对按键信号进行处理,有可能会出现大量错误的按键信号。文件key_xd.vhd是按键消抖程序,文件key_xd.vwf是仿真波形文件。该程序已经通过仿真测试,并且在电路板上调试通过,效果理想。(The information is written in the key consumer vhdl shaking procedures, key consumer shaking in digital circuits using the buttons is very important, if not key signal processing, there may be a lot of the wrong button signal. File key_xd.vhd is key consumer shake procedure is the simulation waveform file key_xd.vwf file. The program has been tested by simulation and debugging in circuit board by, the results are satisfactory.)
- 2010-04-26 16:13:57下载
- 积分:1
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nan
液晶显示屏显示汉字“年”的驱动程序VHDL(nian VHDL)
- 2012-04-28 15:57:46下载
- 积分:1
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VERILOG HDL 实际工控项目源码
开发工具 altera quartus2
VERILOG HDL 实际工控项目源码
开发工具 altera quartus2-verilog HDL actual industrial projects source development tools altera quartus2
- 2022-02-07 05:53:32下载
- 积分:1
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实战训练30 数码管动态扫描
说明: fpga版本的数码管动态扫描程序,可供学习(FPGA version of the digital tube dynamic scanning program for learning)
- 2020-06-26 13:20:01下载
- 积分:1
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3-8
3-8译码器,可以讲三位二进制输入转换为8中取1的输出信号(3-8 decoder, you can talk about the three binary input is converted to 8 of the output signal from 1)
- 2009-07-16 17:23:30下载
- 积分:1
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FPGA_trainning2013A
在EDA实验课上面,自己编写的NCO程序,可以产生出比较真实的正弦波、三角波以及锯齿波,用VHDL程序编写,有modelsim仿真textbench程序(On EDA experiment, oneself write the NCO program, can produce more real sine wave, triangular wave and sawtooth wave with VHDL programming, have the modelsim simulation textbench program
)
- 2013-07-16 15:05:28下载
- 积分:1
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Xilinx_AXI
说明: AXI verilog designs with testbench: AXI-lite, AXI, AXI-stream
- 2020-04-21 01:18:30下载
- 积分:1