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ABS_17_BIT_SOURCE_CODE
说明： 多摩川绝对值编码器的NRG协议源代码,我们公司用的，我修改的解码程序(Tamagawa NRG absolute encoder protocol source code, used by our company, I modified decoding process)
- 2009-07-30 21:06:58下载
- 积分：1
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In the FPGA to achieve the sound card interface, flower, filter comparators, the...
在FPGA上实现声卡接口，电子琴，滤波比较器，最终实现语音通信
-In the FPGA to achieve the sound card interface, flower, filter comparators, the eventual realization of voice communications
- 2022-01-25 20:35:57下载
- 积分：1
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TR0114 VHDL Language Reference
TR0114 VHDL Language Reference
- 2022-03-22 11:52:47下载
- 积分：1
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adc0809
1、用状态机设计A/D转换器ADC0809的采样控制电路，并在数码管上显示转换结果；
2、设置有复位和启动/保持开关，要求
⑴ 复位开关用来使A/D转换器复位，并做好A/D转换准备；
⑵ 启动/保持开关用来控制A/D转换器开始连续转换或停止转换保持结果，即按一下启动/保持开关，启动A/D转换器开始转换，再按一下启/停开关，停止转换并保持结果。
3、采用Verilog HDL语言设计符合上述功能要求的控制电路。(1, with the state machine design A/D converter ADC0809 sampling control circuit and display the results on the digital conversion 2 is provided with a reset and start/hold switch, reset switch is used to make the request ⑴ A/D converter reset and do A/D conversion ready ⑵ start/hold switch is used to control the A/D converter starts converting or stop the conversion to maintain a continuous result that by clicking Start/hold switch, start the A/D converter to start the conversion, and then Click the start/stop switch stops the conversion and keep the results. 3, using Verilog HDL language designed to meet the functional requirements of the above-mentioned control circuit.)
- 2021-01-02 21:38:57下载
- 积分：1
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VGA
说明： 用VERILOG编写的一个可以实现VGA显示的程序.....(Prepared using a VERILOG VGA display program can .....)
- 2011-03-04 12:25:21下载
- 积分：1
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High-speed-digital-correlator
16位高速数字相关器的VERIOLOG程序，已经编译通过了，可以使用(16-bit high-speed digital correlator VERIOLOG program has been compiled by, you can use)
- 2020-10-09 11:37:34下载
- 积分：1
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SPI串口的内核实现（vhdl）,可以用qII等软件直接加到FPGA或者CPLD里面....
SPI串口的内核实现（vhdl）,可以用qII等软件直接加到FPGA或者CPLD里面.-the SPI Serial Kernel (vhdl) can be used directly qII software foisted CPLD or FPGA inside.
- 2023-08-02 22:50:03下载
- 积分：1
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U_XMIT
8位并行转穿行发送程序，波特率可自行设置，经检验有实用效果(8-bit parallel transfer walk through the sending program, the baud rate can be set up their own practical effect inspection)
- 2013-03-15 19:05:49下载
- 积分：1
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ECC密码体制在VHDL
这段代码是用VHDL解释椭圆曲线密码术的。这段代码包含了使用FPGA板进行ECC加密的必要算法！ ；
- 2023-08-26 09:45:04下载
- 积分：1
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SMBus
SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)
- 2021-03-24 18:29:15下载
- 积分：1
