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Verilog代码转换到AHB总线APB
verilog code for apb to ahb convert
- 2023-04-27 12:35:03下载
- 积分:1
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BT1120转GTX详细设计方案
说明: bt1120设计方案,描述了具体的方案设计以及整体的架构设计(Bt1120 design scheme, describes the specific scheme design and the overall architectural design)
- 2020-06-25 05:40:02下载
- 积分:1
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xge_mac_latest.tar
用Verilog编写的以太网控制器,可以使用,里面是全部verilog源码(Ethernet controller based on Verilog, can be used directly, all verilog files)
- 2015-12-21 17:12:51下载
- 积分:1
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Altera QUARTUS 7.2的矩阵键盘电子琴完整工程(含源码),在EP2C20芯片上实现...
Altera QUARTUS 7.2的矩阵键盘电子琴完整工程(含源码),在EP2C20芯片上实现-Altera QUARTUS 7.2 Project of matrix keyboard electronic organ, implement on EP2C20 chip.
- 2022-02-01 23:23:04下载
- 积分:1
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velocity_Verilog
速度表(velocity)要求:1.显示汽车Km/h数;2.车轮每转一圈,有一传感脉冲;每个脉冲代表1m的距离;3.采样周期设为10s;
4.要求显示到小数点后边两位;5.用数码管显示;6. 最高时速小于300Km/h。(约为83.3m/s)
(use verilog to realize velocity)
- 2020-07-13 15:08:51下载
- 积分:1
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DDC
说明: 数字下变频verilog实现,项目中常用模块(apply the digital down frequency in my project)
- 2020-12-08 11:29:20下载
- 积分:1
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VhdlGoldenReferenceGuide
Vhdl Golden Reference Guide.pdf
- 2021-04-23 10:18:48下载
- 积分:1
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fpga_dsp_simple
dsp和fpag通信的测试程序,包含整个工程和signaltap测试信号。(the the dsp and fpag communications test procedures, including the entire the engineering and signaltap test signal.)
- 2013-04-14 15:17:20下载
- 积分:1
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VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling
VHDL Code For Full Adder By Data Flow Modelling
- 2013-11-08 00:39:04下载
- 积分:1
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UART_DMA
UART_DMA的方法是使用nios实现UART方式实现DMA传输,在硬件平台上通过验证实现(UART_DMA way is to use uart dma transfer nios implemented in the hardware platform validated by)
- 2020-11-03 10:39:53下载
- 积分:1