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PS2键盘控制程序实验的内容是用EDK建一个简单的系统并加入自定义的外设(一个ps2键盘控制器)
当键盘按下时会有相应的键扫描码输出显示到PC终端...
PS2键盘控制程序实验的内容是用EDK建一个简单的系统并加入自定义的外设(一个ps2键盘控制器)
当键盘按下时会有相应的键扫描码输出显示到PC终端
-PS2 keyboard to control the content of the experimental procedure is used EDK build a simple system and add custom peripherals (a ps2 keyboard controller) when the keyboard is pressed the corresponding button will scan code to the PC terminal output shows
- 2022-03-26 18:34:50下载
- 积分:1
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20190717 - Copy
this describes building spi block on verilog hdl and programming them on an fpga device
- 2020-06-21 21:40:02下载
- 积分:1
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PS2_kebord_controller
PS2键盘控制器的VHDL源码,用FPGA直接读取键盘的输入并显示。(PS2 keyboard controller VHDL source code, with a direct FPGA to read keyboard input and displayed.)
- 2010-10-15 18:13:27下载
- 积分:1
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dds
DDS实验 matlab 与quartus 的完美结合(DDS experimental combination of matlab and quartus)
- 2010-05-08 08:51:48下载
- 积分:1
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vhdlsource
用verilog hdl编写的一些例程,包括加法器/减法器等等,例子较多就不一一列举了(Verilog hdl prepared with some routines, including the adder/subtraction, etc., for example, more is not to enumerate the)
- 2007-11-30 15:56:27下载
- 积分:1
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sdram_module3
能够实现16位的SDRAM的读写,没有仿真文件,只有SDRAM读写的源代码,用Verilog编写(can complete read or write sdram, only include Verilog code and no simulation files)
- 2013-11-25 12:43:11下载
- 积分:1
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sph-original-codes
SPH的原始代码,希望可以帮到大家啊关于模拟poiseuille的(simulate poiseuille fuild)
- 2020-10-22 10:27:23下载
- 积分:1
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CPLD总线Verilog HDL代码,PLD
CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.-CPLD bus Verilog HDL code, the PLD-10 Quartus4 platform to run through.
- 2022-01-26 04:10:04下载
- 积分:1
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MUX
说明: 用CASE实现4选1数据选择器 很实用 运用VERILOG(Using CASE to achieve 4 election 1 Data Selector practical use Verilog)
- 2008-09-11 11:37:35下载
- 积分:1
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xintf-fpga
本程序主要是实现xinlinx fpga与dsp之间的双工通信(This program is to achieve duplex communication between xilinx fpga and dsp)
- 2021-02-10 18:29:52下载
- 积分:1