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曼彻斯特编码技术用电压的变化表示0和1。规定在每个码元中间发生跳变。高→ 低的跳变表示0,低→ 高的跳变表示为1。每个码元中间都要发生跳变,接收端可将此变化提取...
曼彻斯特编码技术用电压的变化表示0和1。规定在每个码元中间发生跳变。高→ 低的跳变表示0,低→ 高的跳变表示为1。每个码元中间都要发生跳变,接收端可将此变化提取出来作为同步信号,使接收端的时钟与发送设备的时钟保持一致-Manchester coding techniques that use voltage changes in 0 and 1. Provisions in the middle of each symbol hopping happen. High → low hopping express 0, low → high jump for the express one. Symbol between each transition must happen, this change in the receiver can be extracted as a synchronization signal to the receiving end of the clock and send the equipment to maintain the same clock
- 2023-06-17 15:30:03下载
- 积分:1
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sphere-decoding-modulation-by-QAM
16QAM,64QAM,256QAM调制下的球形译码(16QAM, 64QAM, 256QAM modulation sphere decoding)
- 2021-03-31 18:29:09下载
- 积分:1
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0到255任意整数半整数分频Verilog HDL.rar
0到255任意整数半整数分频Verilog HDL.rar-0-255 arbitrary integer half-integer frequency division Verilog HDL.rar
- 2022-02-06 06:46:57下载
- 积分:1
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lowpass
低通滤波器(由matlab和simulink两种方法实现)源文件及图片示例(Low-pass filter) source file and photo examples (by the two methods matlab and simulink)
- 2013-03-13 18:36:40下载
- 积分:1
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这是介绍嵌入式开发相关的资料。有总线与内存的操作
这是介绍嵌入式开发相关的资料。有总线与内存的操作-introduced Embedded Development relevant information. Bus and a memory operation
- 2023-09-02 05:05:15下载
- 积分:1
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自己写得一个关于sine(32X24)的程序
自己写得一个关于sine(32X24)的程序-own written on a sine (32X24) procedures
- 2022-02-28 22:21:58下载
- 积分:1
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TOPSWITCH
TOPSWITCH-Ⅱ系列芯片在功率集成开关电源中应用的研究-TOPSWITCH-Ⅱ series of chips in the power switching power supply in the application of integrated research
- 2022-04-27 21:12:27下载
- 积分:1
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FPGA_Seg7_dsp
关于VHDL和verilog的数码管显示程序,写的很好,值得参考。(About VHDL and verilog digital tube display program, write well, worth considering.)
- 2014-08-01 11:00:51下载
- 积分:1
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六个数码码动态扫描接口程序,用VERILOG语言编写的
六个数码码动态扫描接口程序,用VERILOG语言编写的-Six digital code dynamic scan interface program, using Verilog language
- 2022-03-24 21:40:23下载
- 积分:1
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fenpinqi de vhdlchengxu gongnengfnagzhen,政
分频器的VHDL程序,完整的建立工程,编译,功能功能仿真,验证-fenpinqi de vhdlchengxu gongnengfnagzhen,yanzheng
- 2022-02-21 21:03:34下载
- 积分:1