-
StandardSystemVerilog
这本书主要描述了如何使用system Verilog 建立测试平台和行为级模型(This book will describe how to use the system Verilog test bench and the establishment of behavioral models)
- 2010-05-12 10:35:54下载
- 积分:1
-
CCD
本设计主要用来进行图像采集处理,通过摄像头采集图像信息,经过插值算法后存储到外部SDRAM,然后读取图像数据,进行边缘滤波处理后经VGA输出到屏幕上。(This design is mainly used for image acquisition and processing,through the camera capture image information,after interpolation to the external memory after the SDRAM,and then read the image data processed by the edge filter VGA output to the screen.)
- 2021-05-14 18:30:03下载
- 积分:1
-
wishbone
wishbone接口的设计,在交换机和MAC之间建立wishbone接口(the wishbone interface design, wishbone interface between the switch and MAC)
- 2012-12-05 12:22:24下载
- 积分:1
-
verilog程序设计教程,适合初学者。
verilog程序设计教程,适合初学者。-verilog programming tutorial for beginners.
- 2023-03-06 05:00:04下载
- 积分:1
-
基于fpga的正弦波发生器设计,有一定的参考价值,写的比较详细...
基于fpga的正弦波发生器设计,有一定的参考价值,写的比较详细-The sine wave generator based on FPGA design, have a certain reference value, a more detailed written
- 2022-12-22 09:40:03下载
- 积分:1
-
gtx_drp
高速串行设计FPGA-GTX IP设置生成drp模块,可动态配置速率2.4Gbps,1.2Gbps,0.6Gbps,自适应链接(High-speed serial design FPGA-GTX IP setting generation drp module, dynamically configurable rate 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link)
- 2021-01-19 22:38:43下载
- 积分:1
-
RS_Encoder
具有16个校验位的RS编码器,在FPGA上实现。(With 16 RS encoder, the parity bit in the FPGA.)
- 2012-08-06 11:52:37下载
- 积分:1
-
- 2022-12-10 14:25:03下载
- 积分:1
-
Project12112011
Program for Code Gerneration
- 2011-11-13 19:14:08下载
- 积分:1
-
对于多个子分频的Verilog代码
verilog分频器代码
分为偶数倍分频和奇数倍分频两个verilog源文件 附带一个说明文档-divider verilog code for multiple sub-divided into even and odd frequency divider several times with a two verilog source files documentation
- 2022-10-15 03:40:06下载
- 积分:1