-
是用VHDL语言写的对A/D转换模块的控制程序,希望对大家有帮助。...
是用VHDL语言写的对A/D转换模块的控制程序,希望对大家有帮助。-VHDL language is used on the A/D conversion module control procedures, in the hope that everyone has to help.
- 2023-05-25 06:40:03下载
- 积分:1
-
Altium Partner SN-1000010 r10
说明: Browser modularization processing, browser modularization combing, browser modularization expansion
- 2020-06-24 04:20:01下载
- 积分:1
-
i2c_peri_demo_revC1
说明: I2C 从设备通讯应用示范程序,用于I2C设计验证(I2C slave communication application demo program, used to for I2C design verification )
- 2010-03-18 01:24:52下载
- 积分:1
-
srio
fpga平台实现srio通信,以及srio端口寄存器设计。(FPGA platform to achieve sRIO communication, as well as sRIO port register design.)
- 2017-07-09 16:52:45下载
- 积分:1
-
傅里叶变化
快速付里叶变换子程序所需 RAM 空间以输入的首地址为基址,向增加的方向扩展(Fast Fourier Transform subroutine RAM space required to input the first address of the site was to increase the direction of expansion)
- 2005-08-03 16:04:51下载
- 积分:1
-
canbus verilog实现,原代码文件
canbus verilog实现,原代码文件-canbus verilog implementation, the original source document
- 2022-06-15 18:20:23下载
- 积分:1
-
一个精确的到0.01s的时钟源程序,对于初学VHDL理解很有帮助,只给了源程序没有给出仿真波形...
一个精确的到0.01s的时钟源程序,对于初学VHDL理解很有帮助,只给了源程序没有给出仿真波形-An accurate clock source to the 0.01s for the beginner to understand VHDL helpful not only to the simulation waveform of the source
- 2022-02-19 22:00:27下载
- 积分:1
-
uart_tx
FPGA UART 发送端程序 verilog语言编写
9600波特率 实用(UART transmit side program verilog language 9600 baud)
- 2013-08-14 16:33:34下载
- 积分:1
-
数字和显示-DE2-115
这是一个设计可以执行二进制的十进制数转换的组合电路中的练习
和二进制-编码-十进制 (BCD) 加法。
- 2022-01-24 12:56:55下载
- 积分:1
-
DWT-VHDL
小波变换的VHDL代码,内带正变换逆变换的测试文件。(Wavelet transform VHDL code, with a positive transformation within the inverse transform of the test file.)
- 2010-05-14 20:37:27下载
- 积分:1