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20181060261-李康_3
说明： 秒表的实现，有暂停清零功能，Quartus II(Stopwatch realization, has the pause clear function)
- 2020-12-26 15:56:03下载
- 积分：1
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SD-Host-Controller-master
说明： sd卡的verilog代码，包含一些sd卡例程(SD card Verilog code, including some SD card routines)
- 2021-04-29 13:48:42下载
- 积分：1
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ldpc_decoder_802_3an_latest.tar
LDPC encoder and decoder, very simple
- 2015-03-10 05:35:38下载
- 积分：1
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ise
xilinx的时序约束实验，通过阅读本文档，你可以用全局时序约束来轻松提高已有的项目的系统时钟频率，同时你还可以用映射后静态时序报告以及布局布线后静态时序报告来分析你的设计性能(Xilinx timing constraints of the experiment, by reading this document, you can use the overall timing constraints to easily enhance existing projects the system clock frequency, at the same time you can also use static timing report after mapping, as well as after placement and routing static timing analysis report to you design performance)
- 2007-09-20 14:30:52下载
- 积分：1
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progconterful
four bit counter verlog source code for veriwell including test bench
- 2010-03-29 18:54:45下载
- 积分：1
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mif
使用metlab生产正弦波和三角波的采样值，供vhdl等语言调用来产生波形(use metlab production sine wave and triangular wave of sampling, for languages such as call vhdl to generate waveforms)
- 2007-05-15 15:51:39下载
- 积分：1
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I2C-AT24C02
I2C总线芯片AT24C02程序设计 C++编程(I2C bus AT24C02 chip program design)
- 2013-05-27 15:01:08下载
- 积分：1
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vhdl4
VHDL Language Reference courses part4
- 2010-02-10 00:52:53下载
- 积分：1
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My_POC
Simulating the functions of POC.(Simulating the functions of POC. In VHDL, with ISE.)
- 2017-09-12 15:12:32下载
- 积分：1
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VHDL——如何写简单的testbench
基于VHDL的testbench编写攻略(VHDL based on the preparation of testbench Raiders)
- 2017-07-31 15:00:45下载
- 积分：1
