-
不使用乘法器的乘法运算
无需使用任何乘法器乘法运算。乘法是通过使用移位操作，并找出一些乘法创新的想法，无需使用乘数。
- 2022-11-10 12:45:03下载
- 积分：1
-
sobel
基于FPGA的Spartan-6系列的SOBEL算法实现(Implementation of SOBEL Algorithm Based on FPGA)
- 2018-05-09 15:25:33下载
- 积分：1
-
VGA_yanse
用fpga实现VGA16色真彩的图片显示,且在AX301实验板上已经调试过(VGA16 achieve true color with fpga pictures show, and in the AX301 has been tuned breadboard)
- 2021-02-05 17:59:57下载
- 积分：1
-
同步FIFO verilog
- 2022-03-18 10:42:06下载
- 积分：1
-
fifo
一个FIFO产生程序，主要是一个格雷码的加法器(A FIFO generation process, is primarily a gray code adder)
- 2011-08-28 10:39:31下载
- 积分：1
-
PERI4-DM9000A
基于FPGA的DM9000A芯片的网络数据采集系统，基于NIOS架构，c语言编程，资料齐全，包含不止5个源程序，绝对受用！(FPGA-based the DM9000A chip network data acquisition system based on NIOS architecture, c programming language, the information is complete, contains more than 5 source code is absolutely good enough!)
- 2020-09-16 16:57:55下载
- 积分：1
-
sqrt_pipeline
说明： Matlab - to hdl code for square root
- 2020-06-17 12:20:02下载
- 积分：1
-
SPI-NOR-Flash-controller-Verilog
SPI NOR Flash控制器Verilog源代码(SPI NOR Flash controller Verilog)
- 2020-11-28 15:29:29下载
- 积分：1
-
claa
vhdl code for carry lookahead addder
- 2014-02-05 00:26:26下载
- 积分：1
-
usbd_ucos
基于ALINX AX7020硬件平台的USB-OTG通信程序。操作系统采用uCOS III v1.41，基本实现了双向USB2.0 块传输（Bulk Transfer）通信，zynq的PS端接收USB数据并回传至主机。经测试，主机端Window10系统采用libUSBK编程时，采用64字节的块时，传输速率可达210Mbps。zynq开发工具为Vivado2015.4，程序包中包含了全部的硬件和软件工程文档。(A USB-OTG communication project where an AX7020 platform is employed as USB device. The embeded operating system is uCOS III of version 1.41, and the FPGA toolchain is Vivado 2015.4. This project implements a full speed bidirectional USB2.0 bulk transfer. A test on Windows 10 host with libUSBK shows that the transfer speed is up to 201Mbps.)
- 2020-09-09 09:38:02下载
- 积分：1
