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EnDat
ENDAT 协议说明，包括时序等详细的说明，(endat Encoder characteristics)
- 2021-05-12 22:30:02下载
- 积分：1
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URISC 处理器由数据单元和控制单元组成。数据单元中包含保存运算数据和运算结果的数据寄存器，也包括用来完成数据运算的组合逻辑电路单元。控制单元用来产生控制信号...
URISC 处理器由数据单元和控制单元组成。数据单元中包含保存运算数据和运算结果的数据寄存器，也包括用来完成数据运算的组合逻辑电路单元。控制单元用来产生控制信号序列，以决定何时进行何种数据运算。控制单元要从数据单元得到条件信号，以决定继续进行那些数据运算，数据单元要产生输出信号，数据运算状态等有用信息。-URISC processor by the data unit and control unit. Data unit included in the preservation of data and computing the results of computing the data register, but also data used to complete a combination of computing logic circuit unit. Control unit used to generate the control signal sequence, to determine when and what data computing. Control unit from the data unit received condition signal to determine the continuation of the data computation, data unit to produce output signals, data, such as computing the state of useful information.
- 2022-03-24 14:43:33下载
- 积分：1
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这是一个基于FPGA实现的GPS的程序，保证可以用
这是一个基于FPGA实现的GPS的程序，保证可以用-This is an FPGA-based GPS program to ensure that you can use ... ...
- 2022-05-05 21:41:30下载
- 积分：1
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CCD-color-image-interpolation
CCD图像的颜色插值算法研究及其FPGA实现方法(Color CCD image interpolation algorithm and its FPGA implementation)
- 2021-05-14 18:30:03下载
- 积分：1
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vhdl code for alu and detemines the basic components of alu unit in cpu system
vhdl code for alu and detemines the basic components of alu unit in cpu system
- 2022-02-05 00:57:01下载
- 积分：1
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T144_PER_lcd1602
EP2C5T144 驱动 LCD1602液晶(LCD1602 LCD driver EP2C5T144)
- 2009-05-31 15:48:36下载
- 积分：1
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LBJ
SPI接口协议，将spi总线转换成为LOCALBUS总线(SPI interface protocol, the spi bus converted into LOCAL BUS bus)
- 2021-03-30 09:49:10下载
- 积分：1
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Altera_lcd_color_bar_117
altera公司飓风四代芯片，LCD屏幕彩条显示，有效实现行、场扫描。练习FPGA驱动VGA或LCD显示的入门程序(Altera hurricane four generation chip, LCD screen color display, the effective realization of line and field scanning.Practice FPGA to drive VGA or LCD display)
- 2017-12-18 11:23:10下载
- 积分：1
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report
report for a report for a class
- 2019-04-17 21:19:15下载
- 积分：1
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AVS motion compensation circuit of VLSI Design and Implementation of a standard...
AVS运动补偿电路的VLSI设计与实现
提出了一种基于AVS标准的高效的运动补偿电路硬件结构，该设计采用了8 X 8块级流
水线操作，运动矢量归一化处理和插值滤波器组保证了流水线的高效运行以及硬件资源的最优
利用。采用Verilog语言完成了VLSI设计，并通过EDA软件给出仿真和综合结果。-AVS motion compensation circuit of VLSI Design and Implementation of a standard based on the AVS motion compensation circuit efficient hardware structure, the design used 8 X 8 block-level pipelining, the normalized motion vector processing and interpolation filter bank guarantee efficient operation of the pipeline, as well as the optimal use of hardware resources. Using Verilog language completed VLSI design and EDA software through simulation and synthesis results.
- 2022-01-21 20:19:47下载
- 积分：1
