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V2.tar
SDIO slave, written in verilog, does not support SPI mode.
- 2021-04-05 16:59:04下载
- 积分：1
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PWM
基于FPGA的PWM控制器设计，包含ADC0820模块，按键扫描，PID，PWM控制器等模块，VHDL语言完成，已仿真通过(PWM controller design based on FPGA, including ADC0820 module, key scan, PID, PWM controllers and other modules, VHDL language completed, through simulation)
- 2016-05-01 15:05:58下载
- 积分：1
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Common examples of VHDL, suitable for beginners, there are examples of commonly...
VHDL常用实例，适合初学者，有计时器等常用例子-Common examples of VHDL, suitable for beginners, there are examples of commonly used timer, etc.
- 2023-07-12 06:25:03下载
- 积分：1
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FPGA
说明： fPGA中的竞争冒险现象的来源及其解决方法(FPGA in the source of the phenomenon of competitive risk-taking and their solutions)
- 2008-12-06 17:10:46下载
- 积分：1
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22WALSH
1、掌握WALSH码产生的原理和WALSH码的特性。
2、掌握WALSH码的产生和特性分析的软件仿真。
3、掌握WALSH码的硬件产生方法。
(1, master code WALSH WALSH code generation principles and characteristics. 2, master WALSH code generation and characterization of the software simulation. 3, master code WALSH hardware generation approach.)
- 2020-07-03 08:40:01下载
- 积分：1
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Block-Landscape-Design
3D的效果，逼真的视觉享受，真实的场景。(3D effects, realistic visual experience, the real scene.)
- 2014-06-10 19:28:29下载
- 积分：1
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list_ch06_02_debounce
Eliminate the program of key bounce
- 2012-12-23 00:22:42下载
- 积分：1
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LDPC码校验节点（checknode）进行奇偶校验方程时的vhdl编程，硬件语言实现...
LDPC码校验节点（checknode）进行奇偶校验方程时的vhdl编程，硬件语言实现-LDPC check nodes (checknode) carried out at the time of parity equation VHDL programming, hardware language
- 2022-02-26 15:07:26下载
- 积分：1
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SPI_UVM_VIP
说明： SPI协议的芯片验证VIP,用UVM搭建平台验证代码(Chip verification VIP of SPI protocol, build platform verification code with UVM)
- 2020-08-25 09:58:15下载
- 积分：1
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四位静态数码管控制器，含详细的中文注释，ＶＥＲＩＬＯＴ源码．...
四位静态数码管控制器，含详细的中文注释，ＶＥＲＩＬＯＴ源码．-4 static digital tube controller, with detailed notes in Chinese, VERILOT source.
- 2022-03-29 22:12:43下载
- 积分：1
