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一个异步FIFO的verilog实现论文
一个异步FIFO的verilog实现论文-err
- 2022-01-28 06:08:18下载
- 积分：1
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豪华的CPU的VHDL代码的大学
DLX CPU VHDL CODE UNIVERSITY
- 2022-05-06 01:12:25下载
- 积分：1
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Verilog_HDL源码， Verilog_HDL源码
Verilog_HDL源码， Verilog_HDL源码-Verilog_HDL source, Verilog_HDL FO
- 2022-06-21 00:23:39下载
- 积分：1
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MATLABABCv2
The aim of the ECG simulator is to produce the typical ECG waveforms of different leads and as many arrhythmias as possible. My ECG simulator is a matlab based simulator and is able to produce normal lead II ECG waveform.
- 2017-08-21 21:31:42下载
- 积分：1
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DE2-chinese-user-manual
友晶 altera DE2开发板中文用户手册，对DE2开发板的完整介绍。(DE2 development board Chinese user manual, a complete description of the DE2 board.)
- 2012-04-12 10:28:30下载
- 积分：1
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适用于FPGA的SOPC方面的元器件添加，如COMPNENT
适用于FPGA的SOPC方面的元器件添加，如COMPNENT-Applicable to FPGA-SOPC area to add components, such as COMPNENT
- 2022-02-10 17:06:47下载
- 积分：1
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有关verilog的硬件实现VGA设计的代码。
有关verilog的硬件实现VGA设计的代码。-On the Verilog hardware design realize VGA code.
- 2022-07-17 09:16:28下载
- 积分：1
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phone
用DE0开发板实现电话计费器，基本功能：可设置通话模式，能初始化话费余额，拨动开关可进入通话模式，并根据通话时间和相应通话模式扣除相应的费用。通话过程中能够通过开关切换显示通话时间和话费余额，并可暂停通话。压缩包里有详细的WORD文档的说明，包括波形仿真和DE0的引脚功能介绍。(Implemented by DE0 board telephone billing, basic function: to set the call mode, you can initiate credit balance, toggle switch into the talk mode, and deduct the cost of a call based on call time and the corresponding mode. Call talk time and can be displayed by switching credit balance, and mute. Compression bag has a detailed description of WORD documents, including the waveform simulation and DE0 pin function description.)
- 2020-11-06 13:19:49下载
- 积分：1
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Acoustic-Fingerprinting-master
acousting fingerprint enhancement
- 2019-06-03 21:23:50下载
- 积分：1
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为验证系统的Verilog设计
System Verilog for design verification
- 2022-02-11 21:30:00下载
- 积分：1
