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f_adder
该工程描述的是一位全加器，可以用此作为基础，搭建多位全加器(The project description is a full adder can use this as a basis to build a number of full adder)
- 2013-04-21 10:30:16下载
- 积分：1
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getCPU
获取主机CPU信息，VS2008编译通过，含详细说明(Get information on the host CPU, VS2008 compiler, containing detailed instructions)
- 2014-11-27 10:07:21下载
- 积分：1
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这是FPGA的Spartan 3E基础工程文件。该项目是基于VGA游戏…
this fpga spartan 3e based project file .the project is the game based on vga.
this file contains 2,20,25,400Hz clock generating file as per required for the project.-this is fpga spartan 3e based project file .the project is the game based on vga.
this file contains 2,20,25,400Hz clock generating file as per required for the project.
- 2023-02-25 10:20:03下载
- 积分：1
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EP1C6_EP1C12核心板原理图，方便自己动手做板学习FPGA
EP1C6_EP1C12核心板原理图，方便自己动手做板学习FPGA-EP1C6_EP1C12 core board schematics, do-it-yourself to do to facilitate learning FPGA board
- 2022-07-11 04:51:07下载
- 积分：1
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2-ADC—单通道（DMA读取）
说明： STM32F103 ADC 通过DMA进行读取(STM32F103 ADC reads by DMA)
- 2020-08-20 15:36:26下载
- 积分：1
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HDLC接口协议的FPGA实现使用verilog
HDLC接口协议的FPGA实现使用verilog-design of HDLC
- 2022-06-02 20:47:21下载
- 积分：1
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SDRAM
说明： SDRAM的驱动程序，主要是对SDRAM各类状态进行驱动，有刷新模块、读、写模块等。(The driver of SDRAM mainly drives various states of SDRAM, including refresh module, read and write module.)
- 2020-06-23 01:40:02下载
- 积分：1
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Verilog based on the eight
基于Verilog的八层电梯设计，能够实现自动化的电梯控制。-Verilog based on the eight-lift designed to automate the elevator control.
- 2022-08-13 02:17:13下载
- 积分：1
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FPGA实验，实现了蜂鸣器发出不同的音调，利用按键，很好玩的...
FPGA实验，实现了蜂鸣器发出不同的音调，利用按键，很好玩的-FPGA experiment, realized the buzzer sounded a different tone, the use of keys, it is fun
- 2022-07-24 17:58:54下载
- 积分：1
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EDA常用双LED显示译码程序，将四位二进制数译码为七位对应于LED7位输入的高低电平信号...
EDA常用双LED显示译码程序，将四位二进制数译码为七位对应于LED7位输入的高低电平信号-EDA common dual LED display decoding procedure will be four binary decoding for seven LED7 spaces corresponding to the input signal circuits
- 2022-06-29 02:03:32下载
- 积分：1
