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使用fpga基于积分分离的pid算法进行温控的程序
使用fpga基于积分分离的pid算法进行温控的程序,经实验证明很稳定-Fpga points based on the use of separate pid process temperature control algorithm, the experiment proved to be stable
- 2022-03-22 01:32:19下载
- 积分:1
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chuankou
说明: 本实验为UART回环实例,实验程序分为顶层unrt_top、发送模块uart_tx、接收模块 uart_rx,以及时钟产生模块clk_div。uart_rx将收到的包解析出8位的数据,再传送给 uart_tx发出,形成回环。参考时钟频率为100MHz,波特率设定为9600bps。(This experiment is an example of UART loop. The experimental program is divided into top-level unrt_top, sending module uart_tx, receiving module uart_rx, and clock generation module clk_div. Uart_rx parses the received packet into 8 bits of data and sends it to uart_tx to send out, forming a loop. The reference clock frequency is 100 MHz and the baud rate is set to 9600 bps. stay)
- 2020-06-24 01:40:02下载
- 积分:1
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sinwave
使用verilog hdl语言编程正弦波信号,能仿真出结果(Can use verilog HDL language programming sine wave signal, the simulation results
)
- 2013-09-18 15:27:27下载
- 积分:1
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uart_vivado
说明: UART 收发模块,可移植,编程平台为vivado(uart communication transceiver module, portable)
- 2020-10-17 13:33:10下载
- 积分:1
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alu2
verilog alu 8bit for engineers
- 2011-05-26 11:32:21下载
- 积分:1
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test-ram
design ram v8051 for project
- 2013-07-08 23:24:20下载
- 积分:1
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如何提取嘴唇检测
你好
附上有不同的图像搜索可用的链接的所有图像。
- 2022-09-28 16:50:04下载
- 积分:1
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lic_Xilinx_ISE_Vivado
这是Xilinx ISE 14.X以及vivado、vivado_hls的license,亲测可用(Xilinx ISE 14.x vivado, vivado_hls license, pro-test available)
- 2013-04-26 14:51:09下载
- 积分:1
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手把手教你学FPGA 仿真篇
手把手教你学FPGA 仿真篇,简单实用。(Hand in hand teach you to learn FPGA simulation, simple and practical.)
- 2018-07-09 21:25:09下载
- 积分:1
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4
Verilog的135个经典设计实例.使你工作使用学习中,会有很大帮助,各种典型案例(135 classic Verilog design examples. Make your work with the study, will be of great help, of various typical cases
)
- 2014-03-19 10:55:14下载
- 积分:1