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C-V2X-master
说明： LTE is an abbreviation for Long Term Evolution.
- 2019-06-29 01:08:09下载
- 积分：1
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ep9351_read_reg
ep9351芯片的一个读取寄存器的测试程序，因为他的读取方式跟别的i2c设备不同，所以重新封装了一些i2c读写的接口。(one read ep9351 chip registers testing procedures, because he read i2c device with another different way, so repackaging some i2c interface to read and write.)
- 2015-06-08 10:18:54下载
- 积分：1
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SPI_UART
SPI读写AD9361，通过串口回读关键寄存器读写是否正确。(SPI reads and writes AD9361, reads and writes the key registers correctly through the serial port.)
- 2018-11-19 10:54:24下载
- 积分：1
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dvb_s2_ldpc_decoder_latest.tar
LDPC COded OFDM System
- 2013-02-09 21:41:33下载
- 积分：1
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m_xulie
在quaritusII的开发环境下，verilog语言编写的m序列发生器代码，这种算法简短而有效，非常实用。(In quaritusII development environment, verilog language of m sequence generator code, this algorithm brief but effective, very practical.)
- 2013-09-26 11:30:47下载
- 积分：1
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TimingController
能够实现 LCD时序驱动,通常cpu送出的信号为data bus信号，液晶屏幕并不能正常显示，需要lcd driver(LCD timing controller, usually cpu send out the data bus signal, so the lcd driver can t display normally, need the driver)
- 2011-02-15 21:05:08下载
- 积分：1
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classics_verilog_codes_for_commom_projects
它包含大量用于常见项目的经典verilog代码，如FIFO、add8、RS编码、多路复用等。
- 2022-03-02 04:53:32下载
- 积分：1
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8-fft
FFT 8 PT RDX 2 USING VERILOG
- 2014-03-31 02:35:31下载
- 积分：1
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SDR
直接序列扩频通信的Verilog仿真代码，在Quartus II中实现。(Direct sequence spread spectrum communication Verilog simulation code, implemented in Quartus II.)
- 2011-01-16 12:18:18下载
- 积分：1
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DDS_DAC_Output
本工程使用A7系列FPGA产生DDS，用DAC0832进行正弦电压输出(In this project, A7 series FPGA is used to generate DDS, and DAC0832 is used for sinusoidal voltage output)
- 2019-05-06 10:05:10下载
- 积分：1
