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LDPC_Encoder
说明: verilog 编写的ldpc编码,含有两个文件(LDPC written by Verilog)
- 2021-03-08 19:19:28下载
- 积分:1
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G.hnMAC层功能代码MPDU ASSEMBLER
G.hnMAC层功能代码,实现了MPDU的资源调度(G.gn MAC codeG.gn MAC codeG.gn MAC code)
- 2011-05-18 11:23:08下载
- 积分:1
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COSTAS_LOOP
用verilog编写的科斯塔斯环,希望有帮助(Costas loop written in verilog helpful)
- 2012-10-31 23:01:23下载
- 积分:1
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costas
costas的verilog程序,包含乘法器,DDS,鉴相器,环路滤波器等模块(costas the verilog program, including multipliers, DDS, phase detector, loop filter modules)
- 2011-08-19 10:20:53下载
- 积分:1
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Source code for asyn_fifo using verilog language.
异步FIFO 设计源代码,内涵完整的verilog源代码和测试代码。-Source code for asyn_fifo using verilog language.
- 2022-04-14 15:20:53下载
- 积分:1
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61EDA_C2212
红色飓风II开发板USB2FPGA USB驱动程序,由verilog编写,包括源码和FIFO测试程序(Red Hurricane II development board USB2FPGA USB driver from verilog preparation, including source code and test procedures FIFO)
- 2013-05-30 14:22:07下载
- 积分:1
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06219426Spartan3E
VHDL汇编语言原理及源代码。spartan 3e开发板试用。(VHDL language.)
- 2011-02-10 09:41:12下载
- 积分:1
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DE2-chinese-user-manual
友晶 altera DE2开发板中文用户手册,对DE2开发板的完整介绍。(DE2 development board Chinese user manual, a complete description of the DE2 board.)
- 2012-04-12 10:28:30下载
- 积分:1
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rom_fft
采用xilinx的ROMIP核产生类似正弦信号,经过FFt后可以观察结果(Using the xilinx ROMIP nuclear generating similar sinusoidal signal can be observed through the results after FFt)
- 2013-09-14 20:59:03下载
- 积分:1
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VHDLFIFO
用Verilog 写一个8x16 的FIFO,完成先入先出的功能,并且在FIFO读空时输出EMPTY
有效信号,读指针RP 不再移动;FIFO 写满时输出FULL 有效信号,并且即使WR 有效也
不再向存储单元中写入数据(写指针WP 不再移动)。
(NO)
- 2020-09-20 20:17:51下载
- 积分:1