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lagrange
对原信号进行拉格朗日插值运算，实现信号重采样(The original signal Lagrange interpolation operation, to achieve signal resampling)
- 2013-11-02 14:55:10下载
- 积分：1
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verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，9...
verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，9-10章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code, 9-10
- 2022-08-15 23:59:39下载
- 积分：1
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Key-200893142940130
说明： 关于地铁售票的一些功能 基于自动买票的VHDL设计程序 比较经典(Subway ticket on some of the features of the VHDL-based auto-buying classic design procedure)
- 2008-10-07 18:16:54下载
- 积分：1
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FPGA 出租计费器
本代码绝对真实可靠，原用于长沙理工大学EDA课程设计之出租车计费器。本代码在要求的基础上添加显示时速和报警功能。希望此代码对有此需求的同学有所帮助！
- 2022-01-25 20:43:32下载
- 积分：1
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232543
FPGA Implementation of QFT based Controller for
a Buck type DC-DC Power Converter and
Comparison with Fractional and Integral Order PID
Controllers
- 2010-08-20 17:53:54下载
- 积分：1
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dds
基于FPGA，利用vhdl语言结合matlab工具实现dds,已经仿真(Based on FPGA, VHDL language with matlab tools to achieve DDS, has simulation)
- 2013-04-22 15:36:08下载
- 积分：1
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msk的verilog程序
利用ＦＰＧＡ实现
msk的verilog程序
利用ＦＰＧＡ实现-MSK procedures for the use of Verilog FPGA realize
- 2022-03-12 22:28:22下载
- 积分：1
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Xilinx FPGA moving data across asynchronous clock boundaries
Xilinx FPGA moving data across asynchronous clock boundaries
- 2022-03-05 12:30:25下载
- 积分：1
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sht30
温湿度传感器sht30驱动，系统时钟为125M可读出温湿度。(sht30 driver,sysclk=125MHZ)
- 2020-09-28 17:07:44下载
- 积分：1
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8051core
一款非常实用的8051IPcore,本人现在做soc的控制部分就是它。(A very useful 8051IPcore, I now control part of the soc is doing it.)
- 2010-11-02 10:10:32下载
- 积分：1
