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本源码为Nios II的开发示例,主要演示Nios II的I2C总线设计。开发环境QuartusII。
本示例十分经典，对基于SOPC开发的FPGA初学者有...
本源码为Nios II的开发示例,主要演示Nios II的I2C总线设计。开发环境QuartusII。
本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II I2C-bus design. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
- 2022-05-20 17:06:23下载
- 积分：1
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E1（一级欧洲传输标准）的VHDL
E1 (FIRST ORDER EUROPE TRANSMISSION STANDARD)vhdl
- 2022-04-22 01:03:35下载
- 积分：1
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Crack_QII_13.1_Windows
采用骏龙科技这个13.1新版本破解器.对于已经用了老版本破解器的网友，请把bin和bin64下的sys_cpt.dll删除，然后把sys_cpt.dll.bak名字改成sys_cpt.dll，也就是先恢复正版，然后用这个破解器破解。注意老的license文件也要删除，改用这个新版本破解器附带的license(Cytech Technology 13.1 using the new version of this cracker. Has been used for the old version cracker users, please sys_cpt.dll bin and bin64 under Delete, and then changed the name of the sys_cpt.dll.bak sys_cpt.dll, which is first restore genuine, then use this cracker to crack. Note that the old license file should be deleted in favor of this new version of the license that came with crack)
- 2021-03-04 09:59:32下载
- 积分：1
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power_control
四轴动力模块，用一个顶模块控制，输入有：油门（20档）；指令；水平仪控制指令，4个输出口(Axis power modules, with a top module control inputs are: accelerator (20 files) instruction Level control instructions, four output ports)
- 2013-12-26 20:57:03下载
- 积分：1
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VHDL tutorial for beginning learner
VHDL tutorial for beginning learner
- 2022-03-03 00:20:33下载
- 积分：1
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counter (2)
This tutorial introduce VHDL code for clock pulse and 4-bit counter. With four bits, the counter count from 0 to 15. The timing of the counter is controlled by a clock signal. There will be a clear signal which can reset the counter value.
- 2017-07-18 19:24:12下载
- 积分：1
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索FPGA Verilog使用ROM和RAM实现高dcfifo
alteral FPGA VERILOG 利用 ROM DCFIFO 和RAM
实现高速到低速时钟域的数据传输 ，值得学习。-alteral FPGA VERILOG using ROM DCFIFO and RAM to realize high-speed low-speed clock domain data transfer, it is worth learning.
- 2023-05-06 14:25:03下载
- 积分：1
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24,60,100进制的计数器，还有数字时钟，欢迎下载哦~
24,60,100进制的计数器，还有数字时钟，欢迎下载哦~-24,60,100 229 of the counter, digital clock also welcome to download oh ~
- 2022-11-11 21:25:03下载
- 积分：1
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avoidance-radar
汽车在防撞雷达方向的研究的详细原理的介绍(Introduction of detailed schematic of the car in the direction of the anti-collision radar)
- 2013-01-06 14:01:47下载
- 积分：1
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DE2_115_Synthesizer
FPGA implementation of simple Multi-tone Electronic Keyboard using DE2-115 board with a PS/2 keyboard and speaker
- 2013-08-20 19:48:32下载
- 积分：1
