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GUI
1）选择一个语音信号作为分析对象，或录制一段语音信号； 2）对语音信号进行采样，画出采样前后语音信号的时域波形和频谱图； 3）利用MATLAB中的随机函数产生噪声加入到语音信号中，使语音信号被污染，然后进行频谱分析； 4）设计用于处理该语音信号的数字滤波器，给出滤波器的性能指标，画出滤波器的频率响应； 5）对被噪声污染的语音信号进行滤波，画出滤波前后信号的时域波形和频谱，并对滤波前后的信号进行比较和分析； 6）回放各步骤的语音信号，给出相应处理程序及运行结果分析。(1) Select a voice signal as an analysis object, or record a voice signal 2) sampling the voice signal, draw the waveform and frequency spectrum of the time domain before and after sampling the speech signal 3) using the random function in MATLAB generated noise was added to the speech signal, the speech signal to be contaminated, and then spectrum analysis 4) for processing the speech signal, the digital filter design, given the performance of the filter to draw the filter' s frequency response 5) on the noise pollution of the speech signal is filtered, time-domain waveform and spectrum draw before and after filtering the signal before and after filtering, and the signal for comparison and analysis 6) playback of the speech signal for each step, given the results of the corresponding processing procedures and run analysis.)
- 2021-03-18 17:29:19下载
- 积分：1
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yiweijicunq
说明： 16位右移位寄存器
下面描述的是一个位宽为16位的右移位寄存器，实际具有环形移位的功能，是在右移位寄存器的基础上将最低位的输出端接到最高位的输入端构成的。其功能为当时钟上升沿到达时，输入信号的最低位移位到最高位，其余各位依次向右移动一位。(16-bit right shift register
The following description is a right shift register with a bit width of 16 bits. It actually has the function of circular shift. It is based on the right shift register, which connects the lowest bit output terminal to the highest bit input terminal. Its function is that when the rising edge of the clock arrives, the lowest displacement of the input signal reaches the highest position, and the rest of you move one bit to the right in turn.)
- 2020-08-18 09:58:21下载
- 积分：1
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18_vga_test
说明： 基于Xilinx Spartan6系列的fpga的VGA实现(Based on Xilinx Spartan6 series fpga VGA implementation)
- 2019-04-01 13:47:46下载
- 积分：1
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jpeg_fpga
基于FPGA的JPEG解码，对开发图片解码的人有用。(FPGA-based JPEG decoding, the development of image decoding useful.)
- 2014-02-24 09:19:22下载
- 积分：1
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writereadflash
这个是用VHDL实现FPGA对FLASH的读写。(This is achieved using VHDL FLASH FPGA to read and write.)
- 2013-07-14 22:06:38下载
- 积分：1
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shuzishizhong
数字时钟，包括流程图以及编码和完整的实验报告，内容详细丰富。(Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.)
- 2011-12-20 19:53:07下载
- 积分：1
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EDA
EDA技术及其应用《序列信号发生器的设计》，包括源文件。(EDA technology and its applications " sequence signal generator design, including source files.)
- 2012-10-29 18:30:40下载
- 积分：1
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华为经典FPGA设计全套入门技巧
说明： 华为经典设计全套入门技巧，面试经验，设计技巧(Huawei Classic Design Complete Introduction Skills, Interview Experience, Design Skills)
- 2020-07-01 23:00:02下载
- 积分：1
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table-for-sin-functionof-
DDS中的正余弦生成，初始相位相差90度，可自行改变输出频率(Cosine generation of DDS, the initial phase difference of 90 degrees, the output frequency can be changed on their own)
- 2013-12-17 22:09:56下载
- 积分：1
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dpwm_8bit
数字脉冲宽度调制，将输入的数字信号转换为对应占空比的模拟波形(Digital pulse width modulation, the digital signal is converted to the corresponding input of the duty cycle of the analog waveform)
- 2020-06-28 16:00:02下载
- 积分：1
