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vhdl5
program for half subtractor.
- 2009-10-02 16:10:13下载
- 积分：1
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VHDLquartusmodelsim
内容有VHDL语法总结及相应的实例应用，每个程序我都亲自试过，特别适合初学VHDL的同学们。常用的程序有 设计一个M序列发生器，M序列为“11110101”、 设计一个彩灯控制器，彩灯共有16个，每次顺序点亮相邻的四个彩灯，如此循环执行，循环的方向可以控制。设计一个跑马灯控制器。一共有8个彩灯，编号为LED0~LED7，点亮方式为：先从左往右顺序点亮，然后从右往左，如此循环往复等等。这些都是我在考试前熬夜总结的，很有用。如果配合开发板用的话，那就更好了
( VHDL syntax summary content and the appropriate application instance, every program I have personally tried, especially for students of beginner VHDL. Common program has designed a sequence generator M, the M series is 11110101 , a lantern controller design, a total of 16 lights, each sequence of four adjacent lights lit, so the cycle execution cycle direction can be controlled. Marquee design a controller. A total of eight lights, numbered LED0 ~ LED7, the lighting way: first left to right order of light, and then right to left, so the cycle and so on. These are all I stay up all night before the exam summary, very useful. When combined with the development board, then so much the better
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- 2016-05-15 14:51:51下载
- 积分：1
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位同步实验程序参考bitsynchro
自己写的位同步实验程序参考，该算法需要发送和接收方的频率比较稳定时，可以很快地达到位同步，且十分稳定。位同步是通信技术的基础之一，希望对大家学习有所帮助。(The program is a reference used for bitsynchro writed by myself.When the both send s and receive s frequency are stable,the program can reach bitsynchro fastly.)
- 2013-02-01 11:21:03下载
- 积分：1
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xapp from xilinx very hard to find and very usefull application note from the gr...
xapp from xilinx very hard to find and very usefull application note from the great firm from USA
- 2022-01-25 23:53:59下载
- 积分：1
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Xilinx
Xilinx的I2C总线控制器，verilog版本，文档号是XAPP333，可到Xilinx网上查找具体说明，有对应的VHDL版本的-Xilinx
- 2022-07-04 07:06:06下载
- 积分：1
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很好很强大！重要的入门书籍，非常经典!不可多得！
很好很强大！重要的入门书籍，非常经典!不可多得！-Very good very powerful! Important entry-books, very classic! Rare!
- 2022-04-19 12:08:29下载
- 积分：1
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user_logic_VGA_Controller，适合于DE2开发板，把这个文件夹放在工程目录之中，就可以在SOPC里直接添加VGA_Controller I...
user_logic_VGA_Controller，适合于DE2开发板，把这个文件夹放在工程目录之中，就可以在SOPC里直接添加VGA_Controller IP核了，很方便使用。-user_logic_VGA_Controller. suitable for Dictyophora development board, this folder on the project directory, it can be added directly SOPC Lane VGA_Controller IP core, very convenient to use.
- 2022-07-06 22:09:23下载
- 积分：1
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code
adder 18b trong chuong trinh verilog
- 2017-11-26 14:34:56下载
- 积分：1
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Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0],...
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift range is 0 to 15.
6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it
shifts input data to left.
7. When the signal SIGN is high, the input data is a signed number and it shifts with
sign extension. However, the input data is an unsigned number if the signal SIGN
is low.
8. You can only use following gates in Table I and need to include the delay
information (Tplh, Tphl) in your design.
- 2022-06-13 02:00:08下载
- 积分：1
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基于SPWM自治FPGA
基于FPGA的自治型SPWM波形发生器的设计！正弦脉宽调制（SPWM）技术在以电压源逆变电路为核心的电力电子装置中有着广泛的应用，如何产生SPWM脉冲序列及其实现手段是PWM技术的关键。大家共同探讨哈！-FPGA based SPWM autonomy-based waveform generator design! Sinusoidal pulse width modulation (SPWM) technology in the voltage source inverter circuit as the core of the power electronic devices have a wide range of applications, how to generate SPWM pulse sequence and its implementation means PWM technology is the key. Kazakhstan investigate everyone!
- 2023-03-04 10:10:03下载
- 积分：1
