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sd_ctrl
利用verilog实现对SD卡的控制,可以实现对SD卡的读写。(Verilog SD)
- 2020-12-27 21:49:03下载
- 积分:1
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zobrazenie_16_bit_cisla_paralel
16 bit switch input view in hexa format on 7seg display
- 2013-08-16 00:50:49下载
- 积分:1
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VGA
verilog vga 图像处理(verilog vga)
- 2013-10-15 19:00:16下载
- 积分:1
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基于FPGA的JPEG图像压缩芯片设计
基于FPGA的JPEG图像压缩芯片设计 -FPGA-based JPEG image compression chip design
- 2022-01-28 02:00:46下载
- 积分:1
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8832135
一个具有“百分秒,秒,分”计时功能的数字跑表,可以实现一个小时以内的精确至百分之一秒的计时。
数字跑表的显示读者可以通过编写数码管显示程序来实现,本训练只给出数字跑表的实现过程。
读者还可以通过增加小时的计时功能,实现完整的跑表功能。(A " percentage of seconds, seconds, minutes," digital stopwatch timer can be achieved within an hour of precision to the hundredth of a second time. Digital stopwatch readers can display the digital display through the preparation of procedures to achieve, given the training is only the realization of the process of digital stopwatch. Readers can also function to increase hours of time to achieve full stopwatch function.)
- 2009-04-09 13:20:35下载
- 积分:1
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signal_capture
matlab 程序 伪随机码的捕获,我传的都是这方面的资料!(failed to translate)
- 2013-05-03 12:02:48下载
- 积分:1
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ccd_tcp1209d-driver
ccd驱动程序,刺程序是tcd1209的驱动程序,能够修改积分时间(ccd driver stabbed program is tcd1209 driver can modify the integration time)
- 2021-02-23 09:49:40下载
- 积分:1
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明德扬科教之Gvim_20170511
FPGA核心板EP4CE10F17C8电路原理图(Circuit schematic diagram of EP4CE10F17C8 core board of FPGA)
- 2021-04-14 19:58:55下载
- 积分:1
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Bayer2RGB
Bayer 转RGB Verilog代码实现。。5*5 窗口。在工程中应用的(Bayer to RGB Verilog code implementation. 5*5 window. Applied in Engineering)
- 2020-12-14 15:29:15下载
- 积分:1
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Booth乘法器
- 2022-10-22 10:30:04下载
- 积分:1