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3FP
一个三分频verilog模块，可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)
- 2013-08-25 00:41:29下载
- 积分：1
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Zedboard
上传的是基于Xilinx的新出的开发板Zedboard的一个简单的知道文档，希望对有关同学有所帮助。(Uploaded a simple know the document based on Xilinx' s new development board Zedboard the hope that some of the students to help.)
- 2012-12-17 15:48:11下载
- 积分：1
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and they simply based on the mouse xinlinx ideally VHDL application procedures,...
基于fpga和xinlinx ise的鼠标应用vhdl程序，希望对你有所帮助！-and they simply based on the mouse xinlinx ideally VHDL application procedures, and I hope to help you!
- 2022-02-18 14:46:28下载
- 积分：1
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使用vhdl实现的1024点的FFT算法
使用vhdl实现的1024点的FFT算法-Using vhdl implementation of the 1024-point FFT algorithm
- 2022-01-30 20:38:46下载
- 积分：1
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用FPGA verilog hdl实现千兆以太网MAC。
用FPGA verilog hdl实现千兆以太网MAC。-Using FPGA verilog hdl realize Gigabit Ethernet MAC.
- 2022-05-10 18:11:05下载
- 积分：1
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edaczcjfq
出租车计费，器设计一个出租车自动计费器，计费包括起步价、行车里程计费、停止和暂停不计费三部分。现场模拟汽车的启动、停止、暂停和换挡状态。分别用四位数码管显示金额和里程，各有两位小数，行程 3公里内，起步费为6元，超过3公里，以每公里1.3元计费(Car repair billing device)
- 2018-05-04 11:34:33下载
- 积分：1
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ahb2apb_bridge_verification-master
ahb to apb master verification
- 2021-03-23 22:09:15下载
- 积分：1
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uart_byte_rx
说明： libero soc工程，实现通过串口接收到单字节数据后并返回发送给上位机(Libero SOC project, which realizes receiving single byte data through serial port and sending it back to host computer)
- 2020-06-21 09:20:01下载
- 积分：1
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This is what I did do a UART transmitter when the source and hope for all of us.
这是我做UART时候做的一个发送器的源码，希望对大家有用。-This is what I did do a UART transmitter when the source and hope for all of us.
- 2022-03-25 00:51:09下载
- 积分：1
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FPGA数字AGC(帮同学做的毕业设计)
FPGA数字AGC(帮同学做的毕业设计)-FPGA digital AGC (help students to do the graduation project)
- 2022-03-17 18:29:50下载
- 积分：1
