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改变盒FPGA DE2
Alter kit FPGA de2-35
This project shows a cascade motion through board leds.-Alter kit FPGA de2-35
This project shows a cascade motion through board leds.
- 2022-03-06 03:51:32下载
- 积分：1
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zuoye2
主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)
- 2013-09-18 15:24:13下载
- 积分：1
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Buzzer-music
基于FPGA实现蜂鸣器播放音乐的功能
使用芯片为EP2C8Q208C8N,使用普通蜂鸣器，由于频率不同可实现放歌功能，本例设计的是《友谊地久天长》，使用Verilog语言编程，本例子有工程文件、仿真、波形，经过测试可以使用。(Play music based on FPGA buzzer functions using chip EP2C8Q208C8N, using ordinary buzzer, since the frequency of different functions can be realized sing, in this case the design is " Auld Lang Syne" , using Verilog language programming, this project examples files, simulation, waveform, tested can be used.)
- 2016-07-05 16:15:13下载
- 积分：1
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sobel
Verilog代码实现Sobel算子，包括整个工程，仿真也有。。仿真表明该程序能实现Sobel 算子硬件实现(Verilog，Sobel Operator)
- 2011-05-10 21:11:21下载
- 积分：1
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LDPC_Encoder
verilog 编写的ldpc编码，含有两个文件(LDPC written by Verilog)
- 2021-03-08 19:19:28下载
- 积分：1
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RS2
该源代码是RS（31，19）码的完整编译码程序，采用的是VerilogHDL语言，包含了RS码的编码和译码，这蛋疼的东西花费好多时间(The source code is RS (31,19) code complete encoding and decoding procedures, and spend a lot of time using is VerilogHDL language contains the encoding and decoding of RS codes, this egg pain)
- 2012-09-09 13:04:41下载
- 积分：1
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ADC0832
AD0832 AD转换程序，功能完全通过测试，备注非常详细，KEILC编程，通用性强(AD0832 AD converter, fully functional test, notes, very detailed, KEILC programming, versatility)
- 2011-09-01 17:20:08下载
- 积分：1
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New-Folder
to learn bout development of vhdl code
- 2014-03-15 16:21:38下载
- 积分：1
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使用Xilinx3S400开发的钢板检测算法中心化算法，通过测试。
使用Xilinx3S400开发的钢板检测算法中心化算法，通过测试。-a vhdl-program use Xilinx3S400
- 2022-06-18 05:27:27下载
- 积分：1
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uart
9针的rs232与fpga之间的串口通信源程序(Rs232 9 pin serial communication with the source between fpga)
- 2011-08-22 17:57:52下载
- 积分：1
