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8位7段LED显示源码，扫描显示，稳定高效
8位7段LED显示源码，扫描显示，稳定高效-seven of the eight LED source, scanning, stable and efficient
- 2022-02-15 21:05:29下载
- 积分：1
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DE2_PS2_Debug
这是altera公司的DE2-35开发板下的一个PS2键盘的源程序代码工程，包括PS2驱动等模块有需要的人，可以下载(Altera DE2-35 development board of the company, the source code of a PS2 keyboard works, including the the PS2 driver modules need, you can download)
- 2012-10-19 20:55:20下载
- 积分：1
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使用VHDL语言编程，烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟...
使用VHDL语言编程，烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟-The use of VHDL language programming, burn in the chip to run the last 5 seconds short bell ring 4 final say sound a long tone of digital clock
- 2022-06-20 16:23:08下载
- 积分：1
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uart串行口,用Verilog编写的.供大家参考
uart串行口,用Verilog编写的.供大家参考-uart serial port, using Verilog prepared. For your reference
- 2022-07-17 22:14:09下载
- 积分：1
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math_real
in this code very useful for designing real number concept
- 2013-11-19 19:54:40下载
- 积分：1
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step-motor
how to use step motor
control
- 2013-02-04 13:12:25下载
- 积分：1
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两位独立数码管100进制计数器，每1秒计数一次。从0到99，到99后又回到0....
两位独立数码管100进制计数器，每1秒计数一次。从0到99，到99后又回到0.-Two independent 100-band digital tube counters, every time 1 seconds count. From 0 to 99, to 99 and then back to 0.
- 2022-03-11 18:06:22下载
- 积分：1
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ASYNC_FIFO_SYNTH
This file contains async fifo design
- 2014-03-01 20:48:22下载
- 积分：1
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SDR
直接序列扩频通信的Verilog仿真代码，在Quartus II中实现。(Direct sequence spread spectrum communication Verilog simulation code, implemented in Quartus II.)
- 2011-01-16 12:18:18下载
- 积分：1
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irig_b
用来实现IRIG_B码的解码程序，在XILINX ISE上运行过没有问题，(Used to achieve IRIG_B code decoding process, in XILINX ISE run-off is no problem,)
- 2021-04-06 14:49:03下载
- 积分：1
